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Número de pieza | 74VHC139 | |
Descripción | DUAL 2 TO 4 DECODER / DEMULTIPLEXER | |
Fabricantes | STMicroelectronics | |
Logotipo | ||
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DUAL 2 TO 4 DECODER/DEMULTIPLEXER
s HIGH SPEED: tPD = 5.0 ns (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 4 µA (MAX.) at TA=25°C
s HIGH NOISE IMMUNITY:
VNIH = VNIL = 28% VCC (MIN.)
)s POWER DOWN PROTECTION ON INPUTS
t(ss SYMMETRICAL OUTPUT IMPEDANCE:
c|IOH| = IOL = 8 mA (MIN)
us BALANCED PROPAGATION DELAYS:
dtPLH ≅ tPHL
ro )s OPERATING VOLTAGE RANGE:
P t(sVCC(OPR) = 2V to 5.5V
s PIN AND FUNCTION COMPATIBLE WITH
lete uc74 SERIES 139
ds IMPROVED LATCH-UP IMMUNITY
bso ProDESCRIPTION
The 74VHC139 is an advanced high-speed
- O teCMOS DUAL 2 TO 4 LINE DECODER/
) leDEMULTIPLEXER fabricated with sub-micron
t(s osilicon gate and double-layer metal wiring C2MOS
stechnology.
c bThe active low enable input can be used for gating
u Oor as a data input for demultiplexing applications.
rod -While the enable input is held high, all four outputs
P t(s)are high independently of the other inputs.
SOP
TSSOP
Table 1: Order Codes
PACKAGE
SOP
TSSOP
T&R
74VHC139MTR
74VHC139TTR
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
ObsOoblestoelePteroducFigure 1: Pin Connection And IEC Logic Symbols
November 2004
Rev. 4
1/12
1 page 74VHC139
Table 8: Capacitive Characteristics
Test Condition
Value
Symbol
Parameter
TA = 25°C
-40 to 85°C -55 to 125°C Unit
CIN Input Capacitance
CPD Power Dissipation
Capacitance
(note 1)
Min. Typ. Max. Min. Max. Min. Max.
4 10 10 10 pF
26 pF
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/2 (per
Decoder)
)Figure 4: Test Circuit
duct(-sO) -bsOoblestoelePteroPdruocdt(usc)t(sCL =15/50pF or equivalent (includes jig and probe capacitance)
ro )RT = ZOUT of pulse generator (typically 50Ω)
ObsOoblestoelePteroPduct(sFigure 5: Waveform - Propagation Delays For Inverting Outputs (f=1MHz; 50% duty cycle)
5/12
5 Page Table 9: Revision History
Date
12-Nov-2004
Revision
4
Description of Changes
Order Codes Revision - pag. 1.
74VHC139
ObsOoblestoelePteroPdruocdt(usc)t(-sO) -bsOoblestoelePteroPdruocdt(usc)t(s)
11/12
11 Page |
Páginas | Total 12 Páginas | |
PDF Descargar | [ Datasheet 74VHC139.PDF ] |
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