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PDF MCM32A964SG33 Data sheet ( Hoja de datos )

Número de pieza MCM32A964SG33
Descripción 128KB/256KB Secondary Cache Module With Tag / Valid / and Dirty for i486 Processor Systems
Fabricantes Motorola Semiconductors 
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Advance Information
128KB/256KB Secondary Cache
Module
With Tag, Valid, and Dirty for i486
Processor Systems
This family of cache modules is well suited to provide the secondary cache for
the Intel 82420 PCI chipset. This family provides the 128K Byte and 256K Byte
cache sizes with valid, dirty and a choice of 7, 8, or 9 tag bits. The tag/valid bits
have 12 ns access times for zero wait states at 33 MHz clock speeds. The PD
pins map into the configuration register of the 82420 for auto–configuration of the
cache controller during system startup.
Low Profile Edge Connector: Burndy Part Number: CELP2X56SC3Z48
Single 5 V ± 10% Power Supply
All Inputs and Outputs are TTL Compatible
Three State Outputs
Fast Module Cycle Time: Up to External Processor Bus Speed of 33 MHz
Cache Byte Write, Bank Chip Enable, Bank Output Enable
Decoupling Capacitors are Used for Each Fast Static RAM
High Quality Multi–Layer FR4 PWB With Separate Power and Ground Planes
Order this document
by MCM32A732/D
MCM32A732
MCM32A832
MCM32A932
MCM32A764
MCM32A864
MCM32A964
112–LEAD
CARD EDGE
CASE 1112–01
TOP VIEW
1
45
46
56
BurstRAM is a registered trademark of Motorola.
I486 is a registered trademark Intel Corp.
This document contains information on a new product. Specifications and information herein are subject to change without notice.
REV 1
6/95
M© OMoTtoOroRla,OInLc.A19F94AST SRAM
MCM32A732/764MCM32A832/864MCM32A932/964
1

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MCM32A964SG33 pdf
TRUTH TABLE (X = Don’t Care)
E GW
Mode
VCC Current
HXX
Not Selected
ISB1, ISB2
L H H Output Disabled
ICCA
LLH
Read
ICCA
LXL
Write
ICCA
NOTE: E = Exx, ET; W = Wxx, WT, WA; G = GA, GB
Output
High–Z
High–Z
Dout
High–Z
Cycle
Read Cycle
Write Cycle
ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Power Supply Voltage
Voltage Relative to VSS For Any Pin
Except VCC
VCC
Vin, Vout
– 0.5 to + 7.0
– 0.5 to VCC + 0.5
V
V
Output Current
Iout ± 20 mA
Power Dissipation
PD 11.0 W
Temperature Under Bias
Tbias
– 10 to + 85
°C
Operating Temperature
TA
0 to + 70
°C
Storage Temperature — Plastic
Tstg
– 55 to + 125
°C
NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are
exceeded. Functional operation should be restricted to RECOMMENDED OPER-
ATING CONDITIONS. Exposure to higher than recommended voltages for ex-
tended periods of time could affect device reliability.
This device contains circuitry to protect the
inputs against damage due to high static volt-
ages or electric fields; however, it is advised
that normal precautions be taken to avoid
application of any voltage higher than maxi-
mum rated voltages to this high–impedance
circuit.
This CMOS memory circuit has been de-
signed to meet the dc and ac specifications
shown in the tables, after thermal equilibrium
has been established. The circuit is in a test
socket or mounted on a printed circuit board
and transverse air flow of at least 500 linear
feet per minute is maintained.
DC OPERATING CONDITIONS AND CHARACTERISTICS
(VCC = 5.0 V ±10%, TA = 0 to 70°C, Unless Otherwise Noted)
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Supply Voltage (Operating Voltage Range)
Input High Voltage
VCC
VIH
Input Low Voltage
VIL
* VIL (min) = – 0.5 V dc; VIL (min) = – 2.0 V ac (pulse width 20 ns)
** VIH (max) = VCC + 0.3 V dc; VIH (max) = VCC + 2.0 V ac (pulse width 20 ns)
Min
4.5
2.2
– 0.5*
Typ Max Unit
5.0 5.5 V
— VCC + 0.3** V
— 0.8 V
DC CHARACTERISTICS
Parameter
Input Leakage Current (All Inputs, Vin = 0 to VCC)
Output Leakage Current (E = VIH or G = VIH, Vout = 0 to VCC)
Output High Voltage (IOH = – 4.0 mA)
Output Low Voltage (IOL = 8.0 mA)
Symbol
Ilkg(I)
Ilkg(O)
VOH
VOL
Min
2.4
Max Unit
± 10 µA
± 10 µA
—V
0.4 V
POWER SUPPLY CURRENTS
Parameter
AC Active Supply Current (Iout = 0 mA, VCC = Max, f = fmax)
AC Standby Current (E = VIH, VCC = Max, f = fmax)
CMOS Standby Current (VCC = Max, f = 0 MHz, E VCC – 0.2 V
Vin VSS + 0.2 V, or VCC – 0.2 V)
Symbol
ICCA
ISB1
ISB2
32Ax32
33 MHz
750
180
120
32Ax64
33 MHz
1250
300
200
Unit
mA
mA
mA
MOTOROLA FAST SRAM
MCM32A732/764MCM32A832/864MCM32A932/964
5

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MCM32A964SG33 arduino
PACKAGE DIMENSIONS
112–LEAD
CARD EDGE MODULE
CASE 1112–01
A
C
NOTE 4
B
–Y–
ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉFUÉÉÉÉLL CRÉÉÉÉOMAPRÉÉÉÉOENAENÉÉÉÉT ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ
AC –X–
VIEW AA
2X F
M
ÉÉÉÉÉÉÉÉLÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉFRÉÉÉÉONTÉÉÉÉVIEÉÉÉÉWEÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ
COMPONENT
AREA
BACK VIEW
ÉÉÉÉÉÉR
ÉÉÉÉÉÉRW
112X D
0.004 (0.10) L T Y X S
112X K
(N) 112X H
108X G
VIEW AA
AB
NOTE 5
V
NOTE 4
J NOTE 6
0.012 (0.3) M
–T–
SIDE VIEW
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. CARD THICKNESS APPLIES ACROSS TABS AND
INCLUDES PLATING AND/OR METALLIZATION.
4. DIMENSIONS C AND V DEFINE A DOUBLE–SIDED
MODULE.
5. DIMENSION AB DEFINES OPTIONAL
SINGLE–SIDED MODULE.
6. STRAIGHTNESS CALLOUT APPLIES TO TAB
AREA ONLY.
INCHES
DIM MIN MAX
A 3.130 3.150
B 1.190 1.210
C ––– 0.365
D 0.033 0.037
E 2.415 2.425
F 0.075 BSC
G 0.050 BSC
H ––– 0.030
J 0.055 0.069
K 0.210 –––
L 0.605 0.615
M 2.305 2.315
N 0.110 REF
R 0.285 0.305
V 0.285 –––
W 0.040 0.060
AB ––– 0.220
AC 0.072 0.076
MILLIMETERS
MIN MAX
79.50 80.01
30.23 30.73
––– 9.27
0.84 0.94
61.34 61.60
1.91 BSC
1.27 BSC
––– 0.76
1.40 1.75
5.33 –––
15.37 15.62
58.55 58.80
2.79 REF
7.24 7.75
7.24 –––
1.02 1.52
––– 5.59
1.83 1.93
MOTOROLA FAST SRAM
MCM32A732/764MCM32A832/864MCM32A932/964
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