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부품번호 | 74VHC393MTC 기능 |
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기능 | Dual 4-Bit Binary Counter | ||
제조업체 | Fairchild Semiconductor | ||
로고 | |||
전체 7 페이지수
March 1993
Revised March 1999
74VHC393
Dual 4-Bit Binary Counter
General Description
The VHC393 is an advanced high speed CMOS 4-bit
Binary Counter fabricated with silicon gate CMOS technol-
ogy. It achieves the high speed operation similar to equiva-
lent Bipolar Schottky TTL while maintaining the CMOS low
power dissipation. It contains two independent counter cir-
cuits in one package, so that counting or frequency division
of 8 binary bits can be achieved with one IC. This device
changes state on the negative going transition of the
CLOCK pulse. The counter can be reset to “0” (Q0–Q3 =
“L”) by a HIGH at the CLEAR input regardless of other
inputs.
An input protection circuit ensures that 0V to 7V can be
applied to the input pins without regard to the supply volt-
age. This device can be used to interface 5V to 3V systems
and two supply systems such as battery back up. This cir-
cuit prevents device destruction due to mismatched supply
and input voltages.
Features
s High Speed: fMAX = 170 MHz (typ) at TA = 25°C
s Low power dissipation: ICC = 4 µA (max) at TA = 25°C
s High noise immunity: VNIH = VNIL = 28% VCC (min)
s Power down protection is provided on all inputs
s Pin and function compatible with 74HC393
Ordering Code:
Order Number Package Number
Package Description
74VHC393M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
74VHC393SJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHC393MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74VHC393N
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
CLR1, CLR2
CP1, CP2
QA, QB, QC, QD
Description
Clear Inputs
Clock Pulse Inputs
Outputs
© 1999 Fairchild Semiconductor Corporation DS011571.prf
www.fairchildsemi.com
AC Electrical Characteristics
Symbol
Parameter
V CC
(V)
TA = 25°C
Min Typ Max
TA = −40°C to +85°C
Units
Min Max
Conditions
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
fMAX
Propagation
Delay Time
(CP -QA)
Propagation
Delay Time
(CP -QB)
Propagation
Delay Time
(CP -QC)
Propagation
Delay Time
(CP -QD)
Propagation
Delay Time
(CLR-Qn)
Maximum
Clock
CIN Input Capacitance
CPD Power Dissipation
Capacitance
3.3 ± 0.3
8.6 13.2 1.0 15.5
ns
11.1 16.7 1.0 19.0
CL = 15 pF
CL = 50 pF
5.0 ± 0.5
5.8 8.5 1.0 10.0
ns
7.3 10.5 1.0 12.0
CL = 15 pF
CL = 50 pF
3.3 ± 0.3
10.2
15.8
1.0
18.5
ns
12.7
19.3
1.0
22.0
CL = 15 pF
CL = 50 pF
5.0 ± 0.5
6.8 9.8 1.0 11.5
ns
8.3 11.8 1.0 13.5
CL = 15 pF
CL = 50 pF
3.3 ± 0.3
11.7 18.0 1.0 21.0
ns
14.2
21.5
1.0
24.5
CL = 15 pF
CL = 50 pF
5.0 ± 0.5
7.7 11.2 1.0 13.0
ns
9.2 13.2 1.0 15.0
CL = 15 pF
CL = 50 pF
3.3 ± 0.3
13.0
19.7
1.0
23.0
ns
15.5
23.2
1.0
26.5
CL = 15 pF
CL = 50 pF
5.0 ± 0.5
8.5 12.5 1.0 14.5
ns
10.0
14.5
1.0
16.5
CL = 15 pF
CL = 50 pF
3.3 ± 0.3
7.9 12.3 1.0 14.5
ns
10.4
15.8
1.0
18.0
CL = 15 pF
CL = 50 pF
5.0 ± 0.5
5.4 8.1 1.0 9.5
ns
6.9 10.1 1.0 11.5
CL = 15 pF
CL = 50 pF
3.3 ± 0.3
75
120
65
CL = 15 pF
5.0 ± 0.5
45
125
65
170
35
MHz
CL = 50 pF
105 CL = 15 pF
85 115
75
CL = 50 pF
4 10
10 pF VCC = Open
23 pF (Note 3)
Note 3: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load Average
operating current can be obtained by the equation: ICC(opr.) = CPD*VCC*fIN + ICC/2 (per Counter)
AC Operating Requirements
Symbol
Parameter
tW(L)
tW(H)
tW(H)
tREM
Minimum Pulse
Width (CP)
Minimum Pulse
Width (CLR)
Minimum Removal
Time
VCC
(V)
3.3 ± 0.3
5.0 ± 0.5
3.3 ± 0.3
5.0 ± 0.5
3.3 ± 0.3
5.0 ± 0.5
TA = 25°C
T A = − 40°C to +85°C
Typ Guaranteed Minimum
5.0 5.0
5.0 5.0
5.0 5.0
5.0 5.0
5.0 5.0
4.0 4.0
Units
ns
ns
ns
www.fairchildsemi.com
4
4페이지 Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N14A
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
7페이지 | |||
구 성 | 총 7 페이지수 | ||
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부품번호 | 상세설명 및 기능 | 제조사 |
74VHC393MTC | Dual 4-Bit Binary Counter | Fairchild Semiconductor |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |