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74VHC4051M 데이터시트 PDF




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부품번호 74VHC4051M 기능
기능 8-Channel Analog Multiplexer . Dual 4-Channel Analog Multiplexer . Triple 2-Channel Analog Multiplexer
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74VHC4051M 데이터시트, 핀배열, 회로
April 1994
Revised April 1999
74VHC4051 • 74VHC4052 • 74VHC4053
8-Channel Analog Multiplexer • Dual 4-Channel Analog
Multiplexer • Triple 2-Channel Analog Multiplexer
General Description
These multiplexers are digitally controlled analog switches
implemented in advanced silicon-gate CMOS technology.
These switches have low “on” resistance and low “off” leak-
ages. They are bidirectional switches, thus any analog
input may be used as an output and vice-versa. Also these
switches contain linearization circuitry which lowers the
“on” resistance and increases switch linearity. These
devices allow control of up to ±6V (peak) analog signals
with digital control signals of 0 to 6V. Three supply pins are
provided for VCC, ground, and VEE. This enables the con-
nection of 0–5V logic signals when VCC = 5V and an analog
input range of ±5V when VEE = 5V. All three devices also
have an inhibit control which when high will disable all
switches to their off state. All analog inputs and outputs
and digital inputs are protected from electrostatic damage
by diodes to VCC and ground.
VHC4051: This device connects together the outputs of 8
switches, thus achieving an 8 channel Multiplexer. The
binary code placed on the A, B, and C select lines deter-
mines which one of the eight switches is “on”, and con-
nects one of the eight inputs to the common output.
VHC4052: This device connects together the outputs of 4
switches in two sets, thus achieving a pair of 4-channel
multiplexers. The binary code placed on the A, and B
select lines determine which switch in each 4 channel sec-
tion is “on”, connecting one of the four inputs in each sec-
tion to its common output. This enables the implementation
of a 4-channel differential multiplexer.
VHC4053: This device contains 6 switches whose outputs
are connected together in pairs, thus implementing a triple
2 channel multiplexer, or the equivalent of 3 single-pole-
double throw configurations. Each of the A, B, or C select
lines independently controls one pair of switches, selecting
one of the two switches to be “on”.
Features
s Wide analog input voltage range: ±6V
s Low “on” resistance: 50 typ. (VCC–VEE = 4.5V)
30 typ. (VCC–VEE = 9V)
s Logic level translation to enable 5V logic with ±5V ana-
log signals
s Low quiescent current: 80 µA maximum
s Matched switch characteristic
s Pin and function compatible with the 74HC4051/ 4052/
4053
Ordering Code:
Order Number Package Number
Package Description
74VHC4051M
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
74VHC4051WM
M16B
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
74VHC4051MTC
MTC16
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74VHC4051N
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
74VHC4052M
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
74VHC4052WM
M16B
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
74VHC4052MTC
MTC16
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74VHC4052N
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
74VHC4053M
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
74VHC4053WM
M16B
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
74VHC4053MTC
MTC16
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74VHC4053N
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
© 1999 Fairchild Semiconductor Corporation DS011674.prf
www.fairchildsemi.com




74VHC4051M pdf, 반도체, 판매, 대치품
Absolute Maximum Ratings(Note 1)
(Note 2)
Supply Voltage (VCC)
Supply Voltage (VEE)
Control Input Voltage (VIN)
Switch I/O Voltage (VIO)
Clamp Diode Current (IIK, IOK)
Output Current, per pin (IOUT)
VCC or GND Current, per pin (ICC)
Storage Temperature Range
(TSTG)
Power Dissipation (PD)
(Note 3)
S.O. Package only
Lead Temperature (TL)
(Soldering 10 seconds)
0.5 to +7.5V
+0.5 to 7.5V
1.5 to VCC+1.5V
VEE0.5 to VCC+0.5V
±20 mA
±25 mA
±50 mA
65°C to +150°C
600 mW
500 mW
260°C
Recommended Operating
Conditions
Min Max Units
Supply Voltage (VCC)
Supply Voltage (VEE)
DC Input or Output Voltage
(VIN, VOUT)
Operating Temperature Range
2
0
0
6V
6 V
VCC
V
(TA)
Input Rise or Fall Times
40 +85 °C
(tr, tf)
VCC = 2.0V
1000 ns
VCC = 4.5V
500 ns
VCC = 6.0V
400 ns
Note 1: Absolute Maximum Ratings are those values beyond which dam-
age to the device may occur.
Note 2: Unless otherwise specified all voltages are referenced to ground.
Note 3: Power Dissipation temperature derating — plastic “N” package:
12 mW/°C from 65°C to 85°C.
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74VHC4051M 전자부품, 판매, 대치품
AC Test Circuits and Switching Time Waveforms
FIGURE 1. “ON” Resistance
FIGURE 2. “OFF” Channel Leakage Current
FIGURE 3. “ON” Channel Leakage Current
FIGURE 4. tPHL, tPLH Propagation Delay Time Signal Input to Signal Output
FIGURE 5. tPZL, tPLZ Propagation Delay Time Control to Signal Output
FIGURE 6. tPZH, tPHZ Propagation Delay TIme Control to Signal Output
FIGURE 7. Crosstalk: Control Input to Signal Output
7
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