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PDF 74VHCT139A Data sheet ( Hoja de datos )
| Número de pieza | 74VHCT139A | |
| Descripción | DUAL 2 TO 4 DECODER/DEMULTIPLEXER | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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® 74VHCT139A
DUAL 2 TO 4 DECODER/DEMULTIPLEXER
s HIGH SPEED: tPD = 7.2 ns (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 4 µA (MAX.) at TA = 25 oC
s COMPATIBLE WITH TTL OUTPUTS:
VIH = 2V (MIN), VIL = 0.8V (MAX)
s POWER DOWN PROTECTION ON INPUTS &
OUTPUTS
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 8 mA (MIN)
s BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
s OPERATING VOLTAGE RANGE:
VCC (OPR) = 4.5V to 5.5V
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 139
s IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74VHCT139A is an advanced high-speed
CMOS DUAL 2 TO 4 LINE DECODER/
DEMULTIPLEXER fabricated with sub-micron
silicon gate and double-layer metal wiring C2MOS
technology.
The active low enable input can be used for
PRELIMINARY DATA
SOP
TSSOP
PACKAGE
SOP
TSSOP
ORDER CODES
T UB E
T&R
74VHCT139AM 74VHCT139AMTR
74VHCT139ATTR
gating or as a data input for demultiplexing
applications. While the enable input is held high,
all four outputs are high independently of the
other inputs.
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage. This
device can be used to interface 5V to 3V.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
March 2000
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1 page  
74VHCT139A
WAVEFORM 1: PROPAGATION DELAYS FOR INVERTING OUTPUTS (f=1MHz; 50% duty cycle)
WAVEFORM 2: PROPAGATION DELAYS FOR NON-INVERTING OUTPUTS (f=1MHz; 50% duty cycle)
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5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet 74VHCT139A.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| 74VHCT139A | DUAL 2 TO 4 DECODER/DEMULTIPLEXER | STMicroelectronics |
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