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PDF 74VHCT245A Data sheet ( Hoja de datos )
| Número de pieza | 74VHCT245A | |
| Descripción | OCTAL BUS TRANSCEIVER 3-STATE | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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®
s HIGH SPEED: tPD = 4.5 ns (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 4 µA (MAX.) at TA = 25 oC
s COMPATIBLE WITH TTL OUTPUTS:
VIH = 2V (MIN), VIL = 0.8V (MAX)
s POWER DOWN PROTECTION ON INPUTS &
OUTPUTS
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 8 mA (MIN)
s BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
s OPERATING VOLTAGE RANGE:
VCC (OPR) = 4.5V to 5.5V
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 245
s IMPROVED LATCH-UP IMMUNITY
s LOW NOISE: VOLP = 0.9V (Max.)
DESCRIPTION
The 74VHCT245A is an advanced high-speed
CMOS OCTAL BUS TRANSCEIVER (3-STATE)
fabricated with sub-micron silicon gate and
double-layer metal wiring C2MOS technology.
This IC is intended for two-way asynchronous
communication between data busses; the
direction of data trasmission is determined by the
74VHCT245A
OCTAL BUS
TRANSCEIVER (3-STATE)
PRELIMINARY DATA
M
(Micro Package)
T
(TSSOP Package)
ORDER CODES :
74VHCT245AM 74VHCT245AT
level of the DIR input. The enable input G can be
used to disable the device so that the busses are
effectively isolated.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
IT IS PROHIBITED TO APPLY A SIGNAL TO A
TERMINAL WHEN IT IS IN OUTPUT MODE
AND WHEN A BUS TERMINAL IS FLOATING
(HIGH IMPEDANCE STATE) IT IS REQUESTED
TO FIX THE INPUT LEVEL BY MEANS OF
EXTERNAL PULL DOWN OR PULL UP
RESISTOR.
PIN CONNECTION AND IEC LOGIC SYMBOLS
August 1999
1/9
1 page  
74VHCT245A
CAPACITIVE CHARACTERISTICS
Symb ol
Parameter
Test Conditions
Valu e
Unit
TA = 25 oC
-40 to 85 oC
Min. T yp. Max. Min. Max.
CIN Input Capacitance
4 10
10 pF
CI/O Bus Input Capacitance
8 pF
CPD Power Dissipation
Capacitance (note 1)
13 pF
1) CPD isdefined as the value of the IC’sinternal equivalent capacitance which is calculated fromthe operating current consumption without load. (Referto
Test Circuit).Average operting current can be obtained by the following equation. ICC(opr) = CPD • VCC • fIN + ICC/8(per circuit)
DYNAMIC SWITCHING CHARACTERISTICS
Symb ol
Parameter
Test Conditions
V CC
( V)
Value
TA = 25 oC
Min. Typ. Max.
-40 to 85 oC
Min . Max.
Un it
VOLP Dynamic Low Voltage
VOLV Quiet Output (note 1, 2)
5.0
0.6 0.9
-0.9 -0.6
VIHD Dynamic High Voltage
Input (note 1, 3)
5.0
CL = 50 pF
2
V
VILD Dynamic Low Voltage
Input (note 1, 3)
5.0
0.8
1) Worst case package.
2) Max number of outputs defined as (n). Data inputs are driven 0V to 3.0V, (n -1) outputs switching and one output at GND.
3) Max number of data inputs (n) switching. (n-1) switching 0V to3.0V. Inputs under test switching: 3.0V to threshold (VILD), 0V to threshold (VIHD), f=1MHz.
TEST CIRCUIT
TEST
tPLH, tPHL
tPZL, tPLZ
tPZH, tPHZ
CL = 15/50 pF or equivalent (includes jig and probe capacitance)
RL = R1 = 1KΩ orequivalent
RT = ZOUT of pulse generator (typically 50Ω)
SW IT CH
Open
VCC
GND
5/9
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet 74VHCT245A.PDF ] | |
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