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PDF MAX6323 Data sheet ( Hoja de datos )

Número de pieza MAX6323
Descripción uP Supervisory Circuits
Fabricantes Maxim Integrated 
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No Preview Available ! MAX6323 Hoja de datos, Descripción, Manual

19-1838; Rev 2; 2/03
µP Supervisory Circuits with Windowed
(Min/Max) Watchdog and Manual Reset
General Description
The MAX6323/MAX6324 microprocessor (µP) supervi-
sory circuits monitor power supplies and µP activity in
digital systems. A watchdog timer looks for activity out-
side an expected window of operation. Six laser-
trimmed reset thresholds are available with ±2.5%
accuracy from +2.32V to +4.63V. Valid RESET output is
guaranteed down to VCC = +1.2V.
The RESET output is either push-pull (MAX6323) or
open-drain (MAX6324). RESET is asserted low when
VCC falls below the reset threshold, or when the manual
reset input (MR) is asserted low. RESET remains assert-
ed for at least 100ms after VCC rises above the reset
threshold and MR is deasserted.
The watchdog pulse output (WDPO) utilizes an open-
drain configuration. It can be triggered either by a fast
timeout fault (watchdog input pulses are too close to
each other) or a slow timeout fault (no watchdog input
pulse is observed within the timeout period). The
watchdog timeout is measured from the last falling
edge of watchdog input (WDI) with a minimum pulse
width of 300ns. WDPO is asserted for 1ms when a fault
is observed. Eight laser-trimmed timeout periods are
available.
The MAX6323/MAX6324 are offered in a 6-pin SOT23
package and operate over the extended temperature
range (-40°C to +125°C).
Applications
Automotive
Industrial
Medical
Embedded Control Systems
Features
o Min/Max (Windowed) Watchdog,
8 Factory-Trimmed Timing Options
o Pulsed Open-Drain, Active-Low Watchdog Output
o Power-On Reset
o Precision Monitoring of +2.5V, +3.0V, +3.3V,
and +5.0V Power Supplies
o Open-Drain or Push-Pull RESET Outputs
o Low-Power Operation (23µA typ)
o Debounced Manual Reset Input
o Guaranteed Reset Valid to VCC = +1.2V
Ordering Information
PART*
TEMP
RANGE
PIN-
RESET
PACKAGE OUTPUT
MAX6323_UT__-T -40°C to +125°C 6 SOT23-6 Push-Pull
MAX6324_UT__-T -40°C to +125°C 6 SOT23-6 Open Drain
*These devices are factory trimmed to one of eight watchdog-
timeout windows and one of six reset voltage thresholds. Insert
the letter corresponding to the desired watchdog-timeout window
(A, B, C, D, E, F, G, or H) into the blank following the number
6323 or 6324 (see Watchdog Timeout table). Insert the two-digit
code (46, 44, 31, 29, 26, or 23) after the letters UT for the desired
nominal reset threshold (see Reset Threshold Range table at end
of data sheet).
Note: There are eight standard versions of each device available
(see Standard Versions table). Sample stock is generally held on
standard versions only. Standard versions have an order incre-
ment requirement of 2500 pieces. Nonstandard versions have an
order increment requirement of 10,000 pieces. Contact factory for
availability of nonstandard versions.
TOP VIEW
MR 1
Pin Configuration
6 RESET
GND 2
MAX6323
MAX6324
5 WDPO
WDI 3
4 VCC
SOT23
Typical Operating Circuit appears at end of data sheet.
Watchdog Timeout
WATCHDOG TIMEOUT*
SUFFIX
FAST
MAX
UNITS
SLOW
MIN UNITS
A 1.5 ms 10
B 15 ms 100 ms
C 15 ms 300
D 15 ms 10
s
E 15 ms 60
F 23 ms 47
ms
G 39 ms 82
H 719 ms 1.3
s
*See Figure 1 for operation.
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

1 page




MAX6323 pdf
µP Supervisory Circuits with Windowed
(Min/Max) Watchdog and Manual Reset
Typical Operating Characteristics (continued)
(VCC = full range, TA = +25°C, unless otherwise noted.)
FAST WATCHDOG TIMEOUT PERIOD
MAX6323/24-10
SLOW WATCHDOG TIMEOUT PERIOD
MAX6323/24-11
WDI
2V/div
WDI
2V/div
WDPO
2V/div WDPO
MAX6323AUT23
500µs/div
2V/div
MAX6323AUT23
5ms/div
Pin Description
PIN NAME
FUNCTION
Active-Low, Manual Reset Input. When MR is asserted low, RESET is asserted low, the internal watchdog
1 MR timer is reset to zero, and WDPO is reset to high impedance (open drain). After the rising edge of MR,
RESET is asserted for at least 100ms. Leave MR unconnected or connect to VCC if unused.
2 GND Ground
Watchdog Input. The internal watchdog timer clears to zero on the falling edge of WDI or when RESET goes
3
WDI
high. If WDI sees another falling edge within the factory-trimmed watchdog window, WDPO will remain
unasserted. Transitions outside this window, either faster or slower, will cause WDPO to pulse low for 1ms
(typ).
4
VCC
Supply Voltage for the Device. Input for VCC reset monitor. For noisy systems, bypass VCC with a 500pF
(min) capacitor.
5
WDPO
Watchdog Pulse Output. The open-drain WDPO output is pulsed low for 1ms (typ) upon detection of a fast
or slow watchdog fault. WDPO is only active when RESET is high.
Active-Low. Reset is asserted when VCC drops below VTH and remains asserted until VCC rises above VTH
6 RESET for the duration of the reset timeout period. The MAX6323 has a push-pull output and the MAX6324 has an
open-drain output. Connect a pullup resistor from RESET to any supply voltage up to +6V.
_______________________________________________________________________________________ 5

5 Page





MAX6323 arduino
µP Supervisory Circuits with Windowed
(Min/Max) Watchdog and Manual Reset
VCC
500pF
VCC
MAX6323
MAX6324
RESET
MR WDI
GND WDPO
*RPULLUP
VCC
µP
RESET
I/O
*MAX6324 ONLY
Figure 10. WDPO to MR Loopback Circuit
VCC
500pF
VCC
MAX6323
MAX6324
RESET
MR WDI
GND WDPO
*MAX6324 ONLY
Typical Operating Circuit
*RPULLUP
VCC
µP
RESET
I/O
NMI
______________________________________________________________________________________ 11

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