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M30621MCM-F40GP 데이터시트 PDF




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부품번호 M30621MCM-F40GP 기능
기능 SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
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M30621MCM-F40GP 데이터시트, 핀배열, 회로
Description
Mitsubishi microcomputers
M16C / 62M (80-pin version) Group
. (Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Description
The M16C/62M (80-pin version) group (low voltage version) of single-chip microcomputers are built using
the high-performance silicon gate CMOS process using a M16C/60 Series CPU core and are packaged in
a 80-pin plastic molded QFP. These single-chip microcomputers operate using sophisticated instructions
featuring a high level of instruction efficiency. With 1M bytes of address space, they are capable of execut-
ing instructions at high speed. They also feature a built-in multiplier and DMAC, making them ideal for
controlling office, communications, industrial equipment, and other high-speed processing applications.
The M16C/62M (80-pin version) group (low voltage version) includes a wide range of products with different
internal memory types and sizes and various package types.
Features
• Memory capacity .................................. ROM (See Figure 1.1.3. ROM Expansion)
RAM 10K to 20K bytes
• Shortest instruction execution time ...... 100ns (f(XIN)=10MHZ, VCC=2.7V to 3.6V)
142.9ns (f(XIN)=7MHZ, VCC=2.2V to 3.6V, with software one-wait)
• Supply voltage ..................................... 2.7V to 3.6V (f(XIN)=10MHZ, without software wait)
2.4V to 2.7V (f(XIN)= 7MHZ, without software wait)
2.2V to 2.4V (f(XIN)= 7MHZ, with software one-wait)
• Low power consumption ...................... 28.5mW ( f(XIN)=10MHZ, with software one-wait, VCC = 3V)
• Interrupts .............................................. 25 internal and 5 external interrupt sources, 4 software
interrupt sources; 7 levels (including key input interrupt)
• Multifunction 16-bit timer ...................... 5 output timers + 6 input timers (3 for timer function only)
• Serial I/O .............................................. 5 channels (2 for UART or clock synchronous, 1 for UART, 2 for clock synchronous)
• DMAC .................................................. 2 channels (trigger: 24 sources)
• A-D converter ....................................... 10 bits X 8 channels (Expandable up to 10 channels)
• D-A converter ....................................... 8 bits X 2 channels
• CRC calculation circuit ......................... 1 circuit
• Watchdog timer .................................... 1 line
• Programmable I/O ............................... 70 lines
_______
• Input port .............................................. 1 line (P85 shared with NMI pin)
• Clock generating circuit ....................... 2 built-in clock generation circuits
(built-in feedback resistor, and external ceramic or quartz oscillator)
Note: Memory expansion mode and microprocessor mode are not supported.
Applications
Audio, cameras, office equipment, communications equipment, portable equipment
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M30621MCM-F40GP pdf, 반도체, 판매, 대치품
Description
Mitsubishi microcomputers
M16C / 62M (80-pin version) Group
. (Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Performance Outline
Table 1.1.1 is a performance outline of M16C/62M (80-pin version) group (low voltage version).
Table 1.1.1. Performance outline of M16C/62M (80-pin version) group (low voltage version)
Item Performance
Number of basic instructions
91 instructions
Shortest instruction execution time
100ns(f(XIN)=10MHZ, VCC=2.7V to 3.6V)
142.9ns (f(XIN)=7MHZ, VCC=2.2V to 3.6V, with software one-
wait)
Memory
ROM
(See the figure 1.1.3. ROM Expansion)
capacity
RAM
10K to 20K bytes
I/O port
P0 to P10 (except P85)
8 bits x 6, 7 bits x 2, 4 bits x 2
Input port
P85
1 bit x 1
Multifunction TA0, TA3, TA4
16 bits x 3 (timer mode, internal/external event count,
timer
one-shot timer mode and pulse width measurement mode)
TB0, TB2, TB3, TB4, TB5
16 bits x 5 (timer mode, internal/external event count
and pulse period/pulse width measurement mode)
TA1, TA2
16 bits x 2 (timer mode, internal event count and
a trigger through one-shot timer mode occurs.)
TB1 16 bits x 1 (timer mode and internal event count)
Serial I/O
UART0, UART1, UART2
(UART or clock synchronous) x 2, UART x 1(UART2)
SI/O3, SI/O4
(Clock synchronous) x 2 (SI/O3 is output only)
A-D converter
10 bits x (8 + 2) channels
D-A converter
8 bits x 2
DMAC
2 channels (trigger: 24 sources)
CRC calculation circuit
CRC-CCITT
Watchdog timer
15 bits x 1 (with prescaler)
Interrupt
25 internal and 5 external sources, 4 software sources, 7 levels
Clock generating circuit
2 built-in clock generation circuits
(built-in feedback resistor, and external ceramic or quartz oscillator)
Supply voltage
2.7V to 3.6V (f(XIN)=10MHZ, without software wait)
2.4V to 2.7V (f(XIN)= 7MHZ, without software wait)
2.2V to 2.4V (f(XIN)= 7MHZ, with software one-wait)
Power consumption
28.5mW (f(XIN) = 10MHZ, VCC=3V with software one-wait)
I/O I/O withstand voltage 3V
characteristics Output current
1mA
Device configuration
CMOS high performance silicon gate
Package
80-pin plastic mold QFP
Note : M16C/62M (80-pin version) group (low voltage version) does not support memory expansion or
microprocessor mode.
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M30621MCM-F40GP 전자부품, 판매, 대치품
Description
Mitsubishi microcomputers
M16C / 62M (80-pin version) Group
. (Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
About the M16C/62M (80-pin version) group (low voltage version)
The M16C/62M (80-pin version) group (low voltage version) is packaged in a 80-pin plastic mold pack-
age. The number of pins in comparison with the 100-pin package products is decreased. So be careful
about the following.
(a) The M16C/62M (80-pin version) group (low voltage version) supports single chip mode alone. It
supports neither memory expansion mode nor microprocessor mode.
(b) The input/output ports given below are absent from the M16C/62M (80-pin version) group (low
voltage version). To stabilize the internal state, set to output mode the direction register of each
input/output port. Failing in setting to output mode involves an increase in current consumption.
<Pins absent from the 80-pin version>
P10 to P17, P44 to P47, P72 to P75, P91
(c) INT3 to INT5 allocated to P15 to P17 cannot be used. Keep the INT3 interrupt control register
disabled for interrupts. The INT4 interrupt control register and the INT5 interrupt control register
are shared with SI/O3 and SI/O4. When the user don’t use them as SI/O3 and SI/4, set them
disabled for interrupts.
(d) The output pins of timers A1 and A2 - TA1IN, TA1OUT, TA2IN and TA2OUT - allocated to P72 to P75
cannot be used. In connection with this, the gate function and pulse outputting function of timers A1
and A2 cannot be used. Use timer mode and internal event count, or use as trigger signal genera-
tion in one-shot timer mode.
______ ______
(e) The UART2 input/output pins - CLK2 and CTS/RTS - allocated to P72 and P73 cannot be used. In
connection with this, UART2 solely as UART of the internal clock can be used.
(f) The input pin TB1IN of timer B1 allocated to P91 cannot be used. With timer B1 under this state, use
only timer mode or the internal event count.
(g) The input pin SIN3 of serial I/O3 allocated to P91 cannot be used. In connection with this, use serial
I/O3 as a serial I/O exclusive to transmission.
(h) The output pins for three-phase motor control allocated to P72 to P75 cannot be used. So set to 0
(ordinary mode) the mode select bit (bit 2) of three-phase PWM control register 0.
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M30621MCM-F40GP

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

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