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M74HC648 데이터시트 PDF




ST Microelectronics에서 제조한 전자 부품 M74HC648은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

PDF 형식의 M74HC648 자료 제공

부품번호 M74HC648 기능
기능 HC648 OCTAL BUS TRANSCEIVER/REGISTER 3-STATE / INV. HC646 OCTAL BUS TRANSCEIVER/REGISTER 3-STATE
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M74HC648 데이터시트, 핀배열, 회로
M74HC646
M74HC648
HC646 OCTAL BUS TRANSCEIVER/REGISTER (3-STATE)
HC648 OCTAL BUS TRANSCEIVER/REGISTER (3-STATE, INV.)
. HIGH SPEED
fMAX = 73 MHz (TYP.) AT VCC = 5 V
. LOW POWER DISSIPATION
ICC = 4 µA (MAX.) AT TA = 25 °C
. HIGH NOISE IMMUNITY
VNIH = VNIL = 28 % VCC (MIN.)
. OUTPUT DRIVE CAPABILITY
15 LSTTL LOADS
. SYMMETRICAL OUTPUT IMPEDANCE
IOH= IOL = 6 mA (MIN.)
. BALANCED PROPAGATION DELAYS
tPLH = tPHL
. WIDE OPERATING VOLTAGE RANGE
VCC (OPR) = 2 V TO 6 V
. PIN AND FUNCTION COMPATIBLE
WITH 54/74LS646/648
B1R
(Plastic Package)
M1R
(Micro Package)
ORDER CODES :
M74HCXXXM1R M74HCXXXB1R
DESCRIPTION
The M74HC646/648 are high speed CMOS OCTAL
BUS TRANSCEIVERS AND REGISTERS, (3-
STATE) fabricated in silicon gate C2MOS technol-
ogy. They have the same high speed performance
of LSTTL combined with true CMOS low power con-
sumption.
These devices consist of bus transceiver circuits
with 3-state output, D-type flip-flops, and control cir-
cuitry arranged for multiplexed transmission of data
directly from the input bus or from the internal reg-
isters. Data on the A or B bus will be clocked into the
registers on the low-to-high transition of the appro-
priate clock pin (Clock AB - or Clock BA). Enable (G)
and direction (DIR) pins are provided to control the
transceiver functions. In the transceiver mode, data
present at the high-impedance port may be stored
in either register or in both.
The select controls (Select AB select BA) can multi-
plex stored and real-time (transparent mode) data.
The direction control determines which bus will re-
ceive data when enable G is active (low).
In the isolation mode (enable G high), ”A” data may
be stored in one register and/or ”B” data may be
stored in the other register. When an output function
is disabled, the input function is still enabled and
may be used to store and transmit data. Only one
of the two buses, A or B, may be driven at a time.
All inputs are equipped with protection circuits
PIN CONNECTIONS (top view)
INPUT AND OUTPUT EQUIVALENT CIRCUIT
GAB, GAB, CAB,
SAB, SBA, CBA
A, B
October 1993
1/12




M74HC648 pdf, 반도체, 판매, 대치품
M74HC646/648
PIN DESCRIPTION
PIN No
1
2
3
4, 5, 6, 7, 8, 9, 10, 11
20, 19, 18, 17, 16, 15, 14, 13
21
22
23
12
24
SYMBOL
CLOCK AB
SELECT AB
GAB
A1 to A8
B1 to B8
G
SELECT BA
CLOCK BA
GND
VCC
IEC LOGIC SYMBOLS
HC646
NAME AND FUNCTION
A to B Clock Input (LOW to HIGH, Edge-Trigged)
Select A to B Source Input
Direction Control Input
A data Inputs/Outputs
B Data Inputs/Outputs
Output Enable Input (Active LOW)
Select B to A Source Input
B to A Clock Input (LOW to HIGH, Edge-Triggered)
Ground (0V)
Positive Supply Voltage
HC648
4/12

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M74HC648 전자부품, 판매, 대치품
M74HC646/648
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6 ns)
Symbol
Parameter
Test Conditions
VCC CL
(V) (pF)
Value
TA = 25 oC
-40 to 85 oC
Min. Typ. Max. Min. Max.
Unit
tPLH Propagation Delay Time
tPHL (SELECT - BUS)
2.0
4.5 50
81 170
23 34
215
43 ns
6.0
20 29
37
2.0
4.5 150
98 210
28 42
265
53 ns
6.0
24 36
45
tPZL 3-State Output Enable Time
tPZH (G, DIR)
2.0
4.5 50 RL = 1 K
84 175
24 35
220
44 ns
6.0
20 30
37
2.0
4.5 150 RL = 1 K
102 215
29 43
270
54 ns
6.0
25 37
46
tPLZ Output Disable Time
tPHZ (G, DIR)
2.0
4.5 50 RL = 1 K
60 175
23 35
220
44 ns
6.0
20 30
37
fMAX Maximum Clock Frequency
2.0
4.5 50
6 19
4.8
30 67 24 MHz
6.0
35 79
28
tW(H)
tW(L)
Minimum Clock Pulse Width
2.0
4.5 50
30 75
7 15
95
19 ns
6.0
6 13
16
ts Minimum Set-up Time
2.0
4.5 50
16 50
4 10
65
13 ns
6.0
39
11
th Minimum Hold Time
2.0
4.5 50
55
5 5 ns
6.0 5 5
CIN Input Capacitance
5 10
10 pF
CI/O Bus Terminal Capacitance
10 pF
CPD (*) Power Dissipation Capacitance
for HC646
for HC648
39
38
pF
(*) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load.
(Refer to Test Circuit). Average operting current can be obtained by the following equation. ICC(opr) = CPD VCC fIN + ICC/8 (per bit)
7/12

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