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M93S56 데이터시트 PDF




ST Microelectronics에서 제조한 전자 부품 M93S56은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


PDF 형식의 M93S56 자료 제공

부품번호 M93S56 기능
기능 4Kbit / 2Kbit and 1Kbit 16-bit wide MICROWIRE Serial Access EEPROM with Block Protection
제조업체 ST Microelectronics
로고 ST Microelectronics 로고


M93S56 데이터시트 를 다운로드하여 반도체의 전기적 특성과 매개변수에 대해 알아보세요.




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M93S56 데이터시트, 핀배열, 회로
M93S66, M93S56
M93S46
4Kbit, 2Kbit and 1Kbit (16-bit wide)
MICROWIRE Serial Access EEPROM with Block Protection
FEATURES SUMMARY
s Industry Standard MICROWIRE Bus
s Single Supply Voltage:
– 4.5V to 5.5V for M93Sx6
– 2.5V to 5.5V for M93Sx6-W
– 1.8V to 5.5V for M93Sx6-R
s Single Organization: by Word (x16)
s Programming Instructions that work on: Word or
Entire Memory
s Self-timed Programming Cycle with Auto-Erase
s User Defined Write Protected Area
s Page Write Mode (4 words)
s Ready/Busy Signal During Programming
s Speed:
– 1MHz Clock Rate, 10ms Write Time (Current
product, identified by process identification
letter F or M)
– 2MHz Clock Rate, 5ms Write Time (New
Product, identified by process identification
letter W)
s Sequential Read Operation
s Enhanced ESD/Latch-Up Behavior
s More than 1 Million Erase/Write Cycles
s More than 40 Year Data Retention
Figure 1. Packages
8
1
PDIP8 (BN)
8
1
SO8 (MN)
150 mil width
TSSOP8 (DS)
3x3mm body size
TSSOP8 (DW)
169 mil width
May 2003
1/32




M93S56 pdf, 반도체, 판매, 대치품
M93S66, M93S56, M93S46
Table 2. Instruction Set for the M93S46
Instruction Description
W
PRE
Start
bit
Op-
Code
READ
Read Data
from Memory
X
0
1
10
WRITE
Write Data to
Memory
1
0
1
01
PAWRITE
Page Write to
Memory
1
0
1
11
WRAL
WEN
WDS
Write All
Memory
with same
Data
1 0 1 00
Write Enable 1 0 1 00
Write Disable X 0 1 00
PRREAD
Protection
Register Read
X
1
1
10
PRWRITE
Protection
Register Write
1
1
1
01
PRCLEAR
Protection
Register Clear
1
1
1
11
PREN
Protection
Register
Enable
PRDS
Protection
Register
Disable
Note: 1. X = Dont Care bit.
1 1 1 00
1 1 1 00
Address1
A5-A0
A5-A0
A5-A0
01 XXXX
11 XXXX
00 XXXX
XXXXXX
A5-A0
111111
11XXXX
000000
Data
Required
Clock
Cycles
Additional
Comments
Q15-Q0
Write is executed if
D15-D0
25
the address is not
inside the Protected
area
Nx
D15-D0
9 + N x 16
Write is executed if
all the N addresses
are not inside the
Protected area
Write all data if the
D15-D0 25 Protection Register
is cleared
Q5-Q0
+ Flag
9
9
Data Output =
Protection Register
content + Protection
Flag bit
Data above specified
9 address A5-A0 are
protected
Protect Flag is also
9 cleared (cleared
Flag = 1)
9
9
OTP bit is set
permanently
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M93S56 전자부품, 판매, 대치품
M93S66, M93S56, M93S46
Read
The Read Data from Memory (READ) instruction
outputs serial data on Serial Data Output (Q).
When the instruction is received, the op-code and
address are decoded, and the data from the mem-
ory is transferred to an output shift register. A dum-
my 0 bit is output first, followed by the 16-bit word,
with the most significant bit first. Output data
changes are triggered by the rising edge of Serial
Clock (C). The M93Sx6 automatically increments
the internal address register and clocks out the
next byte (or word) as long as the Chip Select In-
put (S) is held High. In this case, the dummy 0 bit
is not output between bytes (or words) and a con-
tinuous stream of data can be read.
Write Enable and Write Disable
The Write Enable (WEN) instruction enables the
future execution of write instructions, and the Write
Disable (WDS) instruction disables it. When power
is first applied, the M93Sx6 initializes itself so that
write instructions are disabled. After an Write En-
able (WEN) instruction has been executed, writing
remains enabled until an Write Disable (WDS) in-
struction is executed, or until VCC falls below the
power-on reset threshold voltage. To protect the
memory contents from accidental corruption, it is
advisable to issue the Write Disable (WDS) in-
struction after every write cycle. The Read Data
from Memory (READ) instruction is not affected by
the Write Enable (WEN) or Write Disable (WDS)
instructions.
Write
The Write Data to Memory (WRITE) instruction is
composed of the Start bit plus the op-code fol-
lowed by the address and the 16 data bits to be
written.
Write Enable (W) must be held High before and
during the instruction. Input address and data, on
Serial Data Input (D) are sampled on the rising
edge of Serial Clock (C).
After the last data bit has been sampled, the Chip
Select Input (S) must be taken Low before the next
rising edge of Serial Clock (C). If Chip Select Input
(S) is brought Low before or after this specific time
frame, the self-timed programming cycle will not
be started, and the addressed location will not be
programmed.
While the M93Sx6 is performing a write cycle, but
after a delay (tSLSH) before the status information
becomes available, Chip Select Input (S) can be
driven High to monitor the status of the write cycle:
Serial Data Output (Q) is driven Low while the
M93Sx6 is still busy, and High when the cycle is
complete, and the M93Sx6 is ready to receive a
new instruction. The M93Sx6 ignores any data on
the bus while it is busy on a write cycle. Once the
M93Sx6 is Ready, Serial Data Output (Q) is driven
High, and remains in this state until a new start bit
is decoded or the Chip Select Input (S) is brought
Low.
Programming is internally self-timed, so the exter-
nal Serial Clock (C) may be disconnected or left
running after the start of a write cycle.
7/32

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