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PDF MAX1809 Data sheet ( Hoja de datos )
| Número de pieza | MAX1809 | |
| Descripción | 3A / 1MHz / DDR Memory Termination Supply | |
| Fabricantes | Maxim Integrated | |
| Logotipo |  |
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19-2142; Rev 1; 9/02
3A, 1MHz, DDR Memory Termination Supply
General Description
The MAX1809 is a reversible energy flow, constant-off-
time, pulse-width modulated (PWM), step-down DC-DC
converter. It is ideal for use in notebook and subnote-
book computers that require 1.1V to 5V active
termination power supplies. This device features an
internal PMOS power switch and internal synchronous
rectifier for high efficiency and reduced component
count. The internal 90mΩ PMOS power switch and
70mΩ NMOS synchronous-rectifier switch easily deliver
continuous load currents up to 3A. The MAX1809 accu-
rately tracks an external reference voltage, produces
an adjustable output from 1.1V to VIN, and achieves
efficiencies as high as 93%.
The MAX1809 uses a unique current-mode, constant-
off-time, PWM control scheme that allows the output to
source or sink current. This feature allows energy to
return to the input power supply that otherwise would
be wasted. The programmable constant-off-time archi-
tecture sets switching frequencies up to 1MHz, allowing
the user to optimize performance trade-offs between
efficiency, output switching noise, component size, and
cost. The MAX1809 features an adjustable soft-start to
limit surge currents during startup, a 100% duty-cycle
mode for low-dropout operation, and a low-power shut-
down mode that disables the power switches and
reduces supply current below 1µA. The MAX1809 is
available in a 28-pin QFN with an exposed backside
pad, a 28-pin thin QFN, or a 16-pin QSOP.
Applications
DDR Memory Termination
Active Termination Buses
Typical Operating Circuit
VIN
IN
LX
MAX1809 PGND
VCC GND
SHDN
VSET
EXTREF
FB
REF
TOFF SS
VOUT
Features
o Source/Sink 3A
o ±1% Output Accuracy
o Up to 1MHz Switching Frequency
o 93% Efficiency
o Internal PMOS/NMOS Switches
90mΩ/70mΩ On-Resistance at VIN = 4.5V
110mΩ/80mΩ On-Resistance at VIN = 3V
o 1.1V to VIN Adjustable Output Voltage
o 3V to 5.5V Input Voltage Range
o <1µA Shutdown Supply Current
o Programmable Constant-Off-Time Operation
o Thermal Shutdown
o Adjustable Soft-Start Inrush Current Limiting
o Output Short-Circuit Protection
Ordering Information
PART
TEMP RANGE
MAX1809EGI*
-40°C to +85°C
MAX1809EEE
-40°C to +85°C
MAX1809ETI
-40°C to +85°C
*Contact factory for availability.
PIN-PACKAGE
28 QFN
16 QSOP
28 Thin QFN
Pin Configurations
TOP VIEW
N.C. 1
IN 2
LX 3
IN 4
N.C. 5
SS 6
EXTREF 7
MAX1809
21 PGND
20 PGND
19 LX
18 LX
17 PGND
16 VCC
15 GND
THIN QFN
Pin Configurations continued at end of data sheet.
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1 page  
3A, 1MHz, DDR Memory Termination Supply
Typical Operating Characteristics (continued)
(Circuit of Figure 1, VOUT = 1.25V, for VIN = 5V: L = 1µH, RTOFF = 130kΩ; for VIN = 3.3V: L = 0.68µH, RTOFF = 73.2kΩ.)
LOAD-TRANSIENT RESPONSE
LINE-TRANSIENT RESPONSE
RDROOP 12mΩ
VOUT
(AC-COUPLED)
50mV/div
VOUT
(AC-COUPLED)
50mV/div
VIN
2V/div
0V V(LX)
5V/div
0A
IOUT
5A/div
10µs/div
VEXTREF = 1.25V, VIN = 3.3V, IOUT = -2A to +2A to -2A
0V
20µs/div
IOUT = 2A, VIN = 5V to 3.3V to 5V
SWITCHING WAVEFORMS (SOURCING)
0A
0V
400ns/div
IOUT = 2A, VIN = 5V
VOUT
(AC-COUPLED)
50mV/div
I(LX)
2A/div
V(LX)
5V/div
SWITCHING WAVEFORMS (SINKING)
0A
0V
400ns/div
IOUT = -2A, VIN = 5V
VOUT
(AC-COUPLED)
50mV/div
I(LX)
2A/div
V(LX)
5V/div
_______________________________________________________________________________________ 5
5 Page 
3A, 1MHz, DDR Memory Termination Supply
LX
VDDQ
MAX1809
VEXTREF
(1.1V ≤ VEXTREF ≤ VIN - 1.7V)
EXTREF
FB
VOUT = VEXTREF
MAX1809
EXTREF
LX
FB
R2 = R1[(VOUT / VEXTREF) - 1]
VOUT
R2
R1
Figure 5. Adjusting the Output Voltage Using EXTREF
Figure 6. Adjusting the Output Voltage at FB
The output current limit during soft-start varies with
the voltage on the soft-start pin, SS, according to the
equation:
ILIM(SS) =
VSS − 0.7V
1.1V
× ILIMIT
where ILIMIT is the current-limit threshold from the
Electrical Characteristics. The constant-current source
stops charging once the voltage across the soft-start
capacitor reaches 1.8V.
Applications Information
Frequency Variation with Output Current
The operating frequency of the MAX1809 is determined
primarily by tOFF (set by RTOFF), VIN, and VOUT as
shown in the following formula:
( ( ) )fSW
=
VIN −
tOFF VIN
VOUT − VPMOS
− VPMOS + VNMOS
However, as the output current increases, the voltage
drop across the NMOS and PMOS switches increases
and the voltage across the inductor decreases. This
causes the frequency to drop. Assuming RPMOS =
RNMOS, the change in frequency can be approximated
with the following formula:
( )∆fSW
=
∆IOUT × RPMOS
VIN × tOFF
where RPMOS is the resistance of the internal MOSFETs
(90mΩ typ).
Circuit Layout and Grounding
Good layout is necessary to achieve the MAX1809’s
intended output power level, high efficiency, and low
noise. Good layout includes the use of ground planes,
careful component placement, and correct routing of
traces using appropriate trace widths. The following
points are in order of decreasing importance:
1) Minimize switched-current and high-current ground
loops. Connect the input capacitor’s ground, the
output capacitor’s ground, and PGND close together.
Connect the resulting PGND plane to GND at only
one point.
2) Connect the input filter capacitor less than 5mm
away from IN. The connecting copper trace carries
large currents and must be at least 1mm wide,
preferably 2.5mm.
3) Place the LX node components as close together
and as near to the device as possible. This reduces
resistive and switching losses as well as noise.
4) Ground planes are essential for optimum perfor-
mance. In most applications, the circuit is located on
a multilayer board and full use of the four or more
layers is recommended. For heat dissipation, con-
nect the exposed backside pad of the QFN pack-
age to a large analog ground plane, preferably on a
surface of the board that receives good airflow. If
the ground plane is located on the top layer, make
use of the N.C. pins adjacent to GND to lower thermal
resistance to the ground plane. If the ground is
located elsewhere, use several vias to lower thermal
resistance. Typical applications use multiple ground
planes to minimize thermal resistance. Avoid large
AC currents through the analog ground plane.
Voltage Positioning
In applications where the load transients are extremely
fast (>10A/µs), the total output capacitance has to be
large enough to handle the VSAG and VSOAR require-
ments while keeping within the output tolerance limits.
Voltage positioning reduces the total amount of output
capacitance needed to meet a given transient
response requirement. With voltage positioning, the
______________________________________________________________________________________ 11
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet MAX1809.PDF ] | |
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