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Descripción NPN Silicon Power Transistors
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document
by MJ16018/D
Designer's Data Sheet
NPN Silicon Power Transistors
1.5 kV SWITCHMODE Series
These transistors are designed for high–voltage, high–speed, power switching in
inductive circuits where fall time is critical. They are particularly suited for
line–operated switchmode applications.
Typical Applications:
Features:
Switching Regulators
Inverters
Solenoids
Relay Drivers
Motor Controls
Deflection Circuits
Collector–Emitter Voltage — VCEV = 1500 Vdc
Fast Turn–Off Times
80 ns Inductive Fall Time — 100_C (Typ)
110 ns Inductive Crossover Time — 100_C (Typ)
4.5 µs Inductive Storage Time — 100_C (Typ)
100_C Performance Specified for:
Reverse–Biased SOA with Inductive Load
Switching Times with Inductive Loads
Saturation Voltages
Leakage Currents
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎMAXIMUM RATINGS
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎRating
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎCollector–Emitter Voltage
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎCollector–Emitter Voltage
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎEmitter–Base Voltage
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎCollector Current — Continuous
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎΗ Peak(1)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎBase Current — Continuous
— Peak(1)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎTotal Power Dissipation
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ@ TC = 25_C
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ@ TC = 100_C
Derate above TC = 25_C
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎOperating and Storage Junction
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎTemperature Range
Symbol
VCEO(sus)
VCEV
VEB
IC
ICM
IB
IBM
PD
TJ, Tstg
MJ16018 MJW16018
800
1500
6
10
15
8
12
175
100
1
– 65 to 200
125
50
1
– 55 to 150
Unit
Vdc
Vdc
Vdc
Adc
Adc
Watts
W/_C
_C
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎTHERMAL CHARACTERISTICS
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎCharacteristic
Symbol
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎThermal Resistance, Junction to Case
RθJC
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎLead Temperature for Soldering
TL
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎPurposes: 1/8from Case for
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ5 Seconds
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎv(1) Pulse Test: Pulse Width = 5 µs, Duty Cycle 10%.
Max
11
275
Unit
_C/W
_C
MJ16018*
MJW16018*
*Motorola Preferred Device
POWER TRANSISTORS
10 AMPERES
800 VOLTS
125 AND 175 WATTS
CASE 1–07
TO–204AA
MJ16018
CASE 340F–03
TO–247AE
MJW16018
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
Preferred devices are Motorola recommended choices for future use and best overall value.
Designer’s and SWITCHMODE are trademarks of Motorola, Inc.
REV 1
©MMoototorroollaa, IBncip. 1o9la95r Power Transistor Device Data
1

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MJW16018 pdf
MJ16018 MJW16018
100
SECOND BREAKDOWN
80 DERATING
60
THERMAL
DERATING
40
20
MJ16018
MJW16018
0
0 40
80 120 160
TC, CASE TEMPERATURE (°C)
Figure 15. Power Derating
200
SAFE OPERATING AREA INFORMATION
FORWARD BIAS
There are two limitations on the power handling ability of a
transistor: average junction temperature and second break-
down. Safe operating area curves indicate IC – VCE limits of
the transistor that must be observed for reliable operation;
i.e., the transistor must not be subjected to greater dissipa-
tion than the curves indicate.
The data of Figure 13 is based on TC = 25_C; TJ(pk) is
variable depending on power level. Second breakdown pulse
limits are valid for duty cycles to 10% but must be derated
when TC 25_C. Second breakdown limitations do not der-
ate the same as thermal limitations. Allowable current at the
voltages shown on Figure 13 may be found at any case tem-
perature by using the appropriate curve on Figure 15.
TJ(pk) may be calculated from the data in Figure 16. At
high case temperatures, thermal limitations will reduce the
power that can be handled to values less than the limitations
imposed by second breakdown.
REVERSE BIAS
For inductive loads, high voltage and high current must be
sustained simultaneously during turn–off, in most cases, with
the base–to–emitter junction reverse biased. Under these
conditions the collector voltage must be held to a safe level
at or below a specific value of collector current. This can be
accomplished by several means such as active clamping,
RC snubbing, load line shaping, etc. The safe level for these
devices is specified as Reverse Bias Safe Operating Area
and represents the voltage current condition allowable dur-
ing reverse biased turnoff. This rating is verified under
clamped conditions so that the device is never subjected to
an avalanche mode. Figure 14 gives the RBSOA character-
istics.
1.0
0.7 D = 0.5
0.5
0.3
0.2 0.2
0.1
0.1
0.07 0.05
0.05
0.02
0.03
0.02 0.01
0.01
0.01 0.02
SINGLE PULSE
0.05 0.1
0.2
RθJC(t) = r(t) RθJC
RθJC = 1.0°C/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME @ t1
TJ(pk) – TC = P(pk) RθJC(t)
P(pk)
t1
t2
DUTY CYCLE, D = t1/t2
0.5 1.0
2.0 5.0
t, TIME (ms)
10
20
50 100 200
500
Figure 16. Thermal Response
1.0 k
Motorola Bipolar Power Transistor Device Data
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