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MK2042-01 데이터시트 PDF




Integrated Circuit Systems에서 제조한 전자 부품 MK2042-01은 전자 산업 및 응용 분야에서
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부품번호 MK2042-01 기능
기능 Communications Clock Monitor
제조업체 Integrated Circuit Systems
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MK2042-01 데이터시트, 핀배열, 회로
I
C
R
O
ADVANCE
C LOC K
INFORMATION
Communications
MK2042-01
Clock Monitor
Description
The MK2042-01 is designed to switch between
two clock sources. The switching can be externally
controlled by an input pin or configured to switch
automatically if the primary input clock stops.
The part also provides clock detection by reporting
when the primary input clock has stopped.
The MK2042-01 is optimized for use with our
MK2049 family of Communication Clock
Synthesizers. When used together, the
MK2042-01 and MK2049 provide a complete
system for switching to an alternate source when
the primary clock is lost, or for maintaining a
stable frequency on the MK2049 output.
For switching between clock sources with no
output glitches or short pulses, use the ICS580 or
ICS581 multiplexers.
Features
• Packaged in 16 pin SOIC
• User controlled or automatic switching
• Clock detect feature
• Does not add jitter or phase noise to the clock
• Ideal for systems with backup or redundant clocks
• Selectable timeouts for clock loss detection
• Accepts input frequencies from 0 Hz to 160 MHz
• Works with all MK2049-xx to provide enhanced
operation
• 3.3 V or 5 V operation
Block Diagram
VDD GND
SELB
OE
INB
INA
REFIN
S2:S0
CENTER
3
Clock Loss
Detector
VDD
CLKOUT
NO_INA
HIGH
GND
LOW
MDS 2042-01
1
Revision 102600
Printed 11/15/00
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose • CA • 95126 • (408)295-9800tel• www.icst.com




MK2042-01 pdf, 반도체, 판매, 대치품
I
C
R
O
ADVANCE
C LOC K
INFORMATION
Communications
MK2042-01
Clock Monitor
DETECTING CLOCK LOSS
The MK2042-01 internal Clock Loss Detector compares the REFIN clock to the INA clock to determine
when the INA clock is no longer present. During normal operation, the Detector is reset with each rising
edge of the INA clock, and the NO_INA output will remain low. In a fault condition where the INA
clock is removed, the Detector will use the REFIN clock to wait the pre-determined number of REFIN
clock pulses (set by S2:S0 per the table on page 2), and will then force the NO_INA output to a high level.
The NO_INA signal can be used to notify the system that the input clock has been lost, or it can provide
automatic switchover to INB. Automatic switchover to INB is achieved by connecting NO_INA to the
SELB input, as illustrated in Figure 1. In this case the MK2042-01 will automatically switch CLKOUT to
the INB input when the loss of INA is detected. With this configuration, when INA becomes active again,
NO_INA will go low and the MK2042-01 will switch CLKOUT to INA. Since the Clock Loss Detector
will set NO_INA low as soon as an INA clock edge occurs, sporadic edges on INA could cause CLKOUT
to switch unpredictably between INA and INB. Because of this, external system control of SELB is best in
cases where the INA clock is sporadic.
Note that proper operation of the Clock Loss Detector requires that there always be a clock on REFIN.
The REFIN clock does not need to be the same frequency as the INA clock. Because the REFIN clock and
the INA clock are asynchronous, the Clock Loss Detector Count shown in the table on page 2 has a
tolerance of -0/+1 REFIN clock edges.
MDS 2042-01
4
Revision 102600
Printed 11/15/00
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose • CA • 95126 • (408)295-9800tel• www.icst.com

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