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부품번호 8406601QA 기능
기능 CMOS Programmable Peripheral Interface
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8406601QA 데이터시트, 핀배열, 회로
82C55A
June 1998
CMOS Programmable
Peripheral Interface
Features
Description
• Pin Compatible with NMOS 8255A
• 24 Programmable I/O Pins
• Fully TTL Compatible
• High Speed, No “Wait State” Operation with 5MHz and
8MHz 80C86 and 80C88
• Direct Bit Set/Reset Capability
• Enhanced Control Word Read Capability
• L7 Process
• 2.5mA Drive Capability on All I/O Ports
• Low Standby Power (ICCSB) . . . . . . . . . . . . . . . . .10µA
Ordering Information
PART NUMBERS
TEMPERATURE PKG.
5MHz
8MHz PACKAGE
RANGE
NO.
CP82C55A-5
IP82C55A-5
CP82C55A
0oC to 70oC
IP82C55A 40 Ld PDIP -40oC to 85oC
E40.6
E40.6
CS82C55A-5
IS82C55A-5
CS82C55A
0oC to 70oC
IS82C55A 44 Ld PLCC -40oC to 85oC
N44.65
N44.65
CD82C55A-5 CD82C55A
ID82C55A-5
ID82C55A
40 Ld
CERDIP
MD82C55A-5/B MD82C55A/B
0oC to 70oC
-40oC to 85oC
-55oC to 125oC
F40.6
F40.6
F40.6
8406601QA 8406602QA SMD#
F40.6
MR82C55A-5/B
MR82C55A/B
44 Pad
CLCC
-55oC to 125oC J44.A
8406601XA 8406602XA SMD#
J44.A
The Intersil 82C55A is a high performance CMOS version of
the industry standard 8255A and is manufactured using a
self-aligned silicon gate CMOS process (Scaled SAJI IV). It
is a general purpose programmable I/O device which may be
used with many different microprocessors. There are 24 I/O
pins which may be individually programmed in 2 groups of
12 and used in 3 major modes of operation. The high
performance and industry standard configuration of the
82C55A make it compatible with the 80C86, 80C88 and
other microprocessors.
Static CMOS circuit design insures low operating power. TTL
compatibility over the full military temperature range and bus
hold circuitry eliminate the need for pull-up resistors. The
Intersil advanced SAJI process results in performance equal
to or greater than existing functionally equivalent products at
a fraction of the power.
Pinouts
82C55A (DIP)
TOP VIEW
82C55A (CLCC)
TOP VIEW
PA3 1
PA2 2
PA1 3
PA0 4
RD 5
CS 6
GND 7
A1 8
A0 9
PC7 10
PC6 11
PC5 12
PC4 13
PC0 14
PC1 15
PC2 16
PC3 17
PB0 18
PB1 19
PB2 20
40 PA4
39 PA5
38 PA6
37 PA7
36 WR
35 RESET
34 D0
33 D1
32 D2
31 D3
30 D4
29 D5
28 D6
27 D7
26 VCC
25 PB7
24 PB6
23 PB5
22 PB4
21 PB3
6 5 4 3 2 1 44 43 42 41 40
GND 7
NC 8
A1 9
A0 10
PC7 11
PC6 12
PC5 13
PC4 14
PC0 15
PC1 16
PC2 17
39 NC
38 RESET
37 D0
36 D1
35 D2
34 D3
33 D4
32 D5
31 D6
30 D7
29 NC
18 19 20 21 22 23 24 25 26 27 28
CS
GND
A1
A0
PC7
NC
PC6
PC5
PC4
PC0
PC1
82C55A (PLCC)
TOP VIEW
6 5 4 3 2 1 44 43 42 41 40
7 39
8 38
9 37
10 36
11 35
12 34
13 33
14 32
15 31
16 30
17 29
18 1920 21 22 23 24 25 26 27 28
RESET
D0
D1
D2
D3
NC
D4
D5
D6
D7
VCC
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
1
File Number 2969.2




8406601QA pdf, 반도체, 판매, 대치품
82C55A
Ports A, B, and C
The 82C55A contains three 8-bit ports (A, B, and C). All can
be configured to a wide variety of functional characteristics
by the system software but each has its own special features
or “personality” to further enhance the power and flexibility of
the 82C55A.
Port A One 8-bit data output latch/buffer and one 8-bit data
input latch. Both “pull-up” and “pull-down” bus-hold devices
are present on Port A. See Figure 2A.
Port B One 8-bit data input/output latch/buffer and one 8-bit
data input buffer. See Figure 2B.
register will contain 9Bh. During the execution of the system
program, any of the other modes may be selected using a
single output instruction. This allows a single 82C55A to
service a variety of peripheral devices with a simple software
maintenance routine. Any port programmed as an output
port is initialized to all zeros when the control word is written.
ADDRESS BUS
CONTROL BUS
DATA BUS
Port C One 8-bit data output latch/buffer and one 8-bit data
input buffer (no latch for input). This port can be divided into
two 4-bit ports under the mode control. Each 4-bit port con-
tains a 4-bit latch and it can be used for the control signal
output and status signal inputs in conjunction with ports A
and B. See Figure 2B.
RD, WR
MODE 0
B
8 I/O
D7-D0
82C55A
C
A0-A1
CS
A
4 I/O 4 I/O 8 I/O
MASTER
RESET
OR MODE
CHANGE
INTERNAL
DATA IN
INTERNAL
DATA OUT
(LATCHED)
INPUT MODE
OUTPUT MODE
EXTERNAL
PORT A PIN
FIGURE 2A. PORT A BUS-HOLD CONFIGURATION
RESET
OR MODE
CHANGE
VCC
P
PB7-PB0 PC3-PC0 PC7-PC4 PA7-PA0
MODE 1
C
BA
8 I/O
8 I/O
PB7-PB0 CONTROL CONTROL PA7-PA0
OR I/O OR I/O
MODE 2
B
8 I/O
C
A
BI-
DIRECTIONAL
PB7-PB0
CONTROL
PA7-PA0
FIGURE 3. BASIC MODE DEFINITIONS AND BUS INTERFACE
CONTROL WORD
INTERNAL
DATA IN
INTERNAL
DATA OUT
(LATCHED)
OUTPUT MODE
EXTERNAL
PORT B, C
PIN
FIGURE 2B. PORT B AND C BUS-HOLD CONFIGURATION
FIGURE 2. BUS-HOLD CONFIGURATION
Operational Description
Mode Selection
There are three basic modes of operation than can be
selected by the system software:
Mode 0 - Basic Input/Output
Mode 1 - Strobed Input/Output
Mode 2 - Bi-directional Bus
When the reset input goes “high”, all ports will be set to the
input mode with all 24 port lines held at a logic “one” level by
internal bus hold devices. After the reset is removed, the
82C55A can remain in the input mode with no additional ini-
tialization required. This eliminates the need to pullup or pull-
down resistors in all-CMOS designs. The control word
D7 D6 D5 D4 D3 D2 D1 D0
GROUP B
PORT C (LOWER)
1 = INPUT
0 = OUTPUT
PORT B
1 = INPUT
0 = OUTPUT
MODE SELECTION
0 = MODE 0
1 = MODE 1
GROUP A
PORT C (UPPER)
1 = INPUT
0 = OUTPUT
PORT A
1 = INPUT
0 = OUTPUT
MODE SELECTION
00 = MODE 0
01 = MODE 1
1X = MODE 2
MODE SET FLAG
1 = ACTIVE
FIGURE 4. MODE DEFINITION FORMAT
4

4페이지










8406601QA 전자부품, 판매, 대치품
82C55A
Mode 0 Configurations (Continued)
CONTROL WORD #4
D7 D6 D5 D4 D3 D2 D1 D0
10 0 0 1 0 0 0
A
82C55A
D7 - D0
C
B
8
PA7 - PA0
4
PC7 - PC4
4
PC3 - PC0
8
PB7 - PB0
CONTROL WORD #8
D7 D6 D5 D4 D3 D2 D1 D0
10 0 1 0 0 0 0
A
82C55A
D7 - D0
C
B
8
PA7 - PA0
4
PC7 - PC4
4
PC3 - PC0
8
PB7 - PB0
CONTROL WORD #5
D7 D6 D5 D4 D3 D2 D1 D0
10 0 0 1 0 0 1
A
82C55A
D7 - D0
C
B
8
PA7 - PA0
4
PC7 - PC4
4
PC3 - PC0
8
PB7 - PB0
CONTROL WORD #9
D7 D6 D5 D4 D3 D2 D1 D0
10 0 1 0 0 0 1
A
82C55A
D7 - D0
C
B
8
PA7 - PA0
4
PC7 - PC4
4
PC3 - PC0
8
PB7 - PB0
CONTROL WORD #6
D7 D6 D5 D4 D3 D2 D1 D0
10 0 0 1 0 1 0
A
82C55A
D7 - D0
C
B
8
PA7 - PA0
4
PC7 - PC4
4
PC3 - PC0
8
PB7 - PB0
CONTROL WORD #10
D7 D6 D5 D4 D3 D2 D1 D0
10 0 1 0 0 1 0
A
82C55A
D7 - D0
C
B
8
PA7 - PA0
4
PC7 - PC4
4
PC3 - PC0
8
PB7 - PB0
CONTROL WORD #7
D7 D6 D5 D4 D3 D2 D1 D0
10 0 0 1 0 1 1
A
82C55A
D7 - D0
C
B
8
PA7 - PA0
4
PC7 - PC4
4
PC3 - PC0
8
PB7 - PB0
CONTROL WORD #11
D7 D6 D5 D4 D3 D2 D1 D0
10 0 1 0 0 1 1
A
82C55A
D7 - D0
C
B
8
PA7 - PA0
4
PC7 - PC4
4
PC3 - PC0
8
PB7 - PB0
7

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