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PDF MMFT2N25E Data sheet ( Hoja de datos )

Número de pieza MMFT2N25E
Descripción TMOS POWER FET 2.0 AMPERES 250 VOLTS
Fabricantes Motorola Semiconductors 
Logotipo Motorola Semiconductors Logotipo



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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
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TMOS E-FET
High Energy Power FET
N–Channel Enhancement–Mode Silicon Gate
This advanced high voltage TMOS E–FET is designed to
withstand high energy in the avalanche mode and switch efficiently.
This new high energy device also offers a drain–to–source diode
with fast recovery time. Designed for high voltage, high speed
switching applications such as power supplies, PWM motor
controls and other inductive loads, the avalanche energy capability
is specified to eliminate the guesswork in designs where inductive
loads are switched and offer additional safety margin against
unexpected voltage transients.
Avalanche Energy Capability Specified at Elevated
Temperature
Internal Source–to–Drain Diode Designed to Replace External
Zener Transient Suppressor – Absorbs High Energy in the
Avalanche Mode
Source–to–Drain Diode Recovery Time Comparable to
Discrete Fast Recovery Diode
1
G
®
2,4
D
S
3
MMFT2N25E
TMOS POWER FET
2.0 AMPERES
250 VOLTS
RDS(on) = 3.5 W
1
2
3
4
CASE 318E–04, STYLE 3
TO–261AA
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Drain–to–Source Voltage
WDrain–to–Gate Voltage, RGS = 1.0 m
Gate–to–Source Voltage — Continuous
mGate–to–Source Voltage — Single Pulse (tp 50 S)
Drain Current — Continuous @ TC = 25°C
mDrain Current — Continuous @ TC = 100°C
Drain Current — Single Pulse (tp 10 S)
Total Power Dissipation @ TC = 25°C
Derate above 25°C
Total PD @ TA = 25°C mounted on 1Sq. Drain Pad on FR–4 Bd. Material
Total PD @ TA = 25°C mounted on 0.7Sq. Drain Pad on FR–4 Bd. Material
Total PD @ TA = 25°C mounted on min. Drain Pad on FR–4 Bd. Material
VDSS
250
Vdc
VDGR
250
Vdc
VGS
± 20
Vdc
VGSM
± 40
Vdc
ID 2.0 Adc
ID 0.6
IDM 7.0 Apk
PD 0.77 Watts
6.2 mW/°C
1.0 Watts
1.2
0.8
Operating and Storage Temperature Range
TJ, Tstg
UNCLAMPED DRAIN–TO–SOURCE AVALANCHE CHARACTERISTICS (TJ < 150°C)
Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C
(VDD = 80 V, VGS = 10 V, Peak IL= 4.0 Apk, L = 3.0 mH, RG = 25 )
EAS
– 55 to 150
26
°C
mJ
THERMAL CHARACTERISTICS
— Junction–to–Ambient on 1Sq. Drain Pad on FR–4 Bd. Material
— Junction–to–Ambient on 0.7Sq. Drain Pad on FR–4 Bd. Material
— Junction–to–Ambient on min. Drain Pad on FR–4 Bd. Material
RθJA 90 °C/W
103
162
Maximum Lead Temperature for Soldering Purposes, 1/8from case for 10 seconds
TL
260
°C
This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.
TMOS is a registered trademark of Motorola, Inc.
E–FET is a trademark of Motorola, Inc.
©MMoottoororolal,aInTc.M19O9S7 Power MOSFET Transistor Device Data
1

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MMFT2N25E pdf
1.0
D = 0.5
0.2
0.1
0.1
0.05
0.02
0.01
0.01
SINGLE PULSE
0.001
1.0E–5
1.0E–4
1.0E–3
1.0E–2
1.0E–1
t, TIME (seconds)
1.0E+0
Figure 13. Thermal Response
1.0E+1
MMFT2N25E
1.0E+2
1.0E+3
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must be
the correct size to insure proper solder connection interface
between the board and the package. With the correct pad
geometry, the packages will self align when subjected to a
solder reflow process.
0.079
2.0
0.15
3.8
0.091
2.3
0.091
2.3
0.079
2.0
0.059
1.5
0.059
1.5
0.059
1.5
SOT–223
0.248
6.3
inches
mm
Motorola TMOS Power MOSFET Transistor Device Data
5

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