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기능 SINGLE TMOS POWER MOSFET 2.5 AMPERES 20 VOLTS
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MMSF2P02E 데이터시트, 핀배열, 회로
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document
by MMSF2P02E/D
Designer's Data Sheet
Medium Power Surface Mount Products
TMOS Single P-Channel
Field Effect Transistors
MiniMOSdevices are an advanced series of power MOSFETs
which utilize Motorola’s TMOS process. These miniature surface
mount MOSFETs feature ultra low RDS(on) and true logic level
performance. They are capable of withstanding high energy in the
avalanche and commutation modes and the drain–to–source diode
has a low reverse recovery time. MiniMOS devices are designed
for use in low voltage, high speed switching applications where
power efficiency is important. Typical applications are dc–dc
converters, and power management in portable and battery
powered products such as computers, printers, cellular and
cordless phones. They can also be used for low voltage motor
controls in mass storage products such as disk drives and tape
drives. The avalanche energy is specified to eliminate the
guesswork in designs where inductive loads are switched and offer
additional safety margin against unexpected voltage transients.
G
Ultra Low RDS(on) Provides Higher Efficiency and Extends Battery Life
Logic Level Gate Drive — Can Be Driven by Logic ICs
Miniature SO–8 Surface Mount Package — Saves Board Space
Diode Is Characterized for Use In Bridge Circuits
Diode Exhibits High Speed
Avalanche Energy Specified
Mounting Information for SO–8 Package Provided
IDSS Specified at Elevated Temperature
MMSF2P02E
Motorola Preferred Device
SINGLE TMOS
POWER MOSFET
2.5 AMPERES
20 VOLTS
RDS(on) = 0.250 OHM
D
S
CASE 751–05, Style 13
SO–8
N–C
Source
Source
Gate
18
27
36
45
Top View
Drain
Drain
Drain
Drain
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)(1)
Rating
Symbol
Value
Unit
Drain–to–Source Voltage
Gate–to–Source Voltage — Continuous
Drain Current — Continuous @ TA = 25°C (2)
Drain Current — Continuous @ TA = 100°C
Drain Current — Single Pulse (tp 10 µs)
Total Power Dissipation @ TA = 25°C(2)
Operating and Storage Temperature Range
Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C
(VDD = 20 Vdc, VGS = 5.0 Vdc, IL = 6.0 Apk, L = 12 mH, RG = 25 )
Thermal Resistance — Junction to Ambient(2)
Maximum Lead Temperature for Soldering Purposes, 1/8from case for 10 seconds
VDSS
VGS
ID
ID
IDM
PD
TJ, Tstg
EAS
20
± 20
2.5
1.7
13
2.5
– 55 to 150
216
Vdc
Vdc
Adc
Apk
Watts
°C
mJ
RθJA
TL
50 °C/W
260 °C
DEVICE MARKING
S2P02
(1) Negative sign for P–Channel device omitted for clarity.
(2) Mounted on 2” square FR4 board (1” sq. 2 oz. Cu 0.06” thick single sided), 10 sec. max.
ORDERING INFORMATION
Device
Reel Size
Tape Width
Quantity
MMSF2P02ER2
13
12 mm embossed tape
2500 units
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
Designer’s, HDTMOS and MiniMOS are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
Thermal Clad is a registered trademark of Bergquist Company.
Preferred devices are Motorola recommended choices for future use and best overall value.
REV 4
©MMoottoororolal,aInTc.M19O9S6 Power MOSFET Transistor Device Data
1




MMSF2P02E pdf, 반도체, 판매, 대치품
MMSF2P02E
POWER MOSFET SWITCHING
Switching behavior is most easily modeled and predicted
by recognizing that the power MOSFET is charge controlled.
The lengths of various switching intervals (t) are deter-
mined by how fast the FET input capacitance can be charged
by current from the generator.
The published capacitance data is difficult to use for calculat-
ing rise and fall because drain–gate capacitance varies
greatly with applied voltage. Accordingly, gate charge data is
used. In most cases, a satisfactory estimate of average input
current (IG(AV)) can be made from a rudimentary analysis of
the drive circuit so that
t = Q/IG(AV)
During the rise and fall time interval when switching a resis-
tive load, VGS remains virtually constant at a level known as
the plateau voltage, VSGP. Therefore, rise and fall times may
be approximated by the following:
tr = Q2 x RG/(VGG – VGSP)
tf = Q2 x RG/VGSP
where
VGG = the gate drive voltage, which varies from zero to VGG
RG = the gate drive resistance
and Q2 and VGSP are read from the gate charge curve.
During the turn–on and turn–off delay times, gate current is
not constant. The simplest calculation uses appropriate val-
ues from the capacitance curves in a standard equation for
voltage change in an RC network. The equations are:
td(on) = RG Ciss In [VGG/(VGG – VGSP)]
td(off) = RG Ciss In (VGG/VGSP)
The capacitance (Ciss) is read from the capacitance curve at
a voltage corresponding to the off–state condition when cal-
culating td(on) and is read at a voltage corresponding to the
on–state when calculating td(off).
At high switching speeds, parasitic circuit elements com-
plicate the analysis. The inductance of the MOSFET source
lead, inside the package and in the circuit wiring which is
common to both the drain and gate current paths, produces a
voltage at the source which reduces the gate drive current.
The voltage is determined by Ldi/dt, but since di/dt is a func-
tion of drain current, the mathematical solution is complex.
The MOSFET output capacitance also complicates the
mathematics. And finally, MOSFETs have finite internal gate
resistance which effectively adds to the resistance of the
driving source, but the internal resistance is difficult to mea-
sure and, consequently, is not specified.
1000
VDS = 0 V
800 Ciss
VGS = 0 V
TJ = 25°C
600
400 Crss
Ciss
Coss
200
Crss
0
10 5 0 5 10 15 20 25 30
VGS VDS
GATE–TO–SOURCE OR DRAIN–TO–SOURCE VOLTAGE (VOLTS)
Figure 7. Capacitance Variation
100
VDD = 10 V
ID = 2 A
VGS = 10 V
TJ = 25°C
12
9
VDS
6
Q1
Q2
QT
VGS
16
12
8
3
Q3
0
02
ID = 2 A
TJ = 25°C
4 6 8 10
Qg, TOTAL GATE CHARGE (nC)
4
0
12
Figure 8. Gate–to–Source and
Drain–to–Source Voltage versus Total Charge
2
TJ = 25°C
VGS = 0 V
1.6
1.2
td(off)
tr
tf
td(on)
10
1 10 100
RG, GATE RESISTANCE (OHMS)
Figure 9. Resistive Switching Time Variation
versus Gate Resistance
0.8
0.4
0
0.6
0.8 1 1.2 1.4
VSD, SOURCE–TO–DRAIN VOLTAGE (VOLTS)
Figure 10. Diode Forward Voltage
versus Current
1.6
4 Motorola TMOS Power MOSFET Transistor Device Data

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MMSF2P02E 전자부품, 판매, 대치품
MMSF2P02E
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within a
short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
Always preheat the device.
The delta temperature between the preheat and soldering
should be 100°C or less.*
When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering method,
the difference shall be a maximum of 10°C.
The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
When shifting from preheating to soldering, the maximum
temperature gradient shall be 5°C or less.
After soldering has been completed, the device should be
allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and result
in latent failure due to mechanical stress.
Mechanical stress or shock should not be applied during
cooling.
* Soldering a device without preheating can cause excessive
thermal shock and stress which can result in damage to the
device.
TYPICAL SOLDER HEATING PROFILE
For any given circuit board, there will be a group of control
settings that will give the desired heat pattern. The operator
must set temperatures for several heating zones and a figure
for belt speed. Taken together, these control settings make up
a heating “profile” for that particular circuit board. On
machines controlled by a computer, the computer remembers
these profiles from one operating session to the next. Figure
13 shows a typical heating profile for use when soldering a
surface mount device to a printed circuit board. This profile will
vary among soldering systems, but it is a good starting point.
Factors that can affect the profile include the type of soldering
system in use, density and types of components on the board,
type of solder used, and the type of board or substrate material
being used. This profile shows temperature versus time. The
line on the graph shows the actual temperature that might be
experienced on the surface of a test board at or near a central
solder joint. The two profiles are based on a high density and
a low density board. The Vitronics SMD310 convection/in-
frared reflow soldering system was used to generate this
profile. The type of solder used was 62/36/2 Tin Lead Silver
with a melting point between 177 –189°C. When this type of
furnace is used for solder reflow work, the circuit boards and
solder joints tend to heat first. The components on the board
are then heated by conduction. The circuit board, because it
has a large surface area, absorbs the thermal energy more
efficiently, then distributes this energy to the components.
Because of this effect, the main body of a component may be
up to 30 degrees cooler than the adjacent solder joints.
200°C
STEP 1
PREHEAT
ZONE 1
“RAMP”
STEP 2
VENT
“SOAK”
STEP 3
HEATING
ZONES 2 & 5
“RAMP”
STEP 4
STEP 5
HEATING HEATING
ZONES 3 & 6 ZONES 4 & 7
“SOAK”
“SPIKE”
DESIRED CURVE FOR HIGH
MASS ASSEMBLIES
160°C
170°C
STEP 6
VENT
STEP 7
COOLING
205° TO 219°C
PEAK AT
SOLDER JOINT
150°C
100°C
150°C
100°C
140°C
SOLDER IS LIQUID FOR
40 TO 80 SECONDS
(DEPENDING ON
MASS OF ASSEMBLY)
DESIRED CURVE FOR LOW
MASS ASSEMBLIES
50°C
TIME (3 TO 7 MINUTES TOTAL)
TMAX
Figure 16. Typical Solder Heating Profile
Motorola TMOS Power MOSFET Transistor Device Data
7

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MMSF2P02E

SINGLE TMOS POWER MOSFET 2.5 AMPERES 20 VOLTS

Motorola Semiconductors
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