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PDF MMSF7N03Z Data sheet ( Hoja de datos )
| Número de pieza | MMSF7N03Z | |
| Descripción | SINGLE TMOS POWER MOSFET 7.5 AMPERES 30 VOLTS | |
| Fabricantes | Motorola Semiconductors | |
| Logotipo |  |
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document
by MMSF7N03Z/D
™Designer's Data Sheet
Medium Power Surface Mount Products
TMOS Single N-Channel with
Monolithic Zener ESD
Protected Gate
EZFETs™ are an advanced series of power MOSFETs which utilize
Motorola’s High Cell Density TMOS process and contain monolithic
back–to–back zener diodes. These zener diodes provide protection
against ESD and unexpected transients. These miniature surface
mount MOSFETs feature ultra low RDS(on) amd true logic level
performance. They are capable of withstanding high energy in the
avalanche and commutation modes and the drain–to–source diode
has a very low reverse recovery time. EZFET devices are designed
for use in low voltage, high speed switching applications where power
efficiency is important. Typical applications are dc–dc converters, and
power management in portable and battery powered products such as
computers, printers, cellular and cordless phones. They can also be
used for low voltage motor controls in mass storage products such as
disk drives and tape drives.
G
MMSF7N03Z
Motorola Preferred Device
SINGLE TMOS
POWER MOSFET
7.5 AMPERES
30 VOLTS
RDS(on) = 0.030 OHM
™
D
CASE 751–05, Style 12
SO–8
• Zener Protected Gates Provide Electrostatic Discharge Protection
• Ultra Low RDS(on) Provides Higher Efficiency and Extends Battery Life
• Designed to withstand 200V Machine Model and 2000V Human Body Model
• Logic Level Gate Drive — Can Be Driven by Logic ICs
• Miniature SO–8 Surface Mount Package — Saves Board Space
• Diode Is Characterized for Use In Bridge Circuits
• Diode Exhibits High Speed, With Soft Recovery
• IDSS Specified at Elevated Temperature
• Mounting Information for SO–8 Package Provided
S
Source
Source
Source
Gate
18
27
36
45
Drain
Drain
Drain
Drain
Top View
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Drain–to–Source Voltage
Drain–to–Gate Voltage (RGS = 1.0 MΩ)
Gate–to–Source Voltage — Continuous
Drain Current — Continuous @ TA = 25°C (1)
Drain Current — Continuous @ TA = 70°C (1)
Drain Current — Pulsed Drain Current (3)
Total Power Dissipation @ TA = 25°C (1)
Linear Derating Factor (1)
VDSS
VDGR
VGS
ID
ID
IDM
PD
30 Vdc
30 Vdc
± 15 Vdc
7.5 Adc
5.6
60 Apk
2.5 Watts
20 mW/°C
Total Power Dissipation @ TA = 25°C (2)
Linear Derating Factor (2)
PD 1.6 Watts
12 mW/°C
Operating and Storage Temperature Range
Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C
(VDD = 30 Vdc, VGS = 5.0 Vdc, Peak IL = 15 Apk, L = 4.0 mH, RG = 25 Ω)
Thermal Resistance — Junction to Ambient (1)
— Junction to Ambient (2)
TJ, Tstg
EAS
RθJA
– 55 to 150
450
50
80
°C
mJ
°C/W
(1) When mounted on 1 inch square FR–4 or G–10 board (VGS = 10 V, @ 10 Seconds)
(2) When mounted on 1 inch square FR–4 or G–10 board (VGS = 10 V, @ Steady State)
(3) Repetitive rating; pulse width limited by maximum junction temperature.
DEVICE MARKING
ORDERING INFORMATION
S7N03Z
Device
MMSF7N03ZR2
Reel Size
13″
Tape Width
12 mm embossed tape
Quantity
2500 units
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
Preferred devices are Motorola recommended choices for future use and best overall value.
HDTMOS and EZFET are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc. Thermal Clad is a trademark of the
Bergquist Company.
©MMoottoororolal,aInTc.M19O9S6 Power MOSFET Transistor Device Data
1
1 page  
12 24
QT
10 20
8
VDS
6
VGS
16
12
Q1
4
Q2
2
Q3
0
05
10 15 20 25
Qg, TOTAL GATE CHARGE (nC)
ID = 5 A
TJ = 25°C
8
4
0
30 35
Figure 8. Gate–To–Source and Drain–To–Source
Voltage versus Total Charge
1000 VDD = 15 V
ID = 7.5 A td(off)
VGS = 10 V
TJ = 25°C
tf
100 tr
td(on)
MMSF7N03Z
10
1 10 100
RG, GATE RESISTANCE (OHMS)
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
DRAIN–TO–SOURCE DIODE CHARACTERISTICS
The switching characteristics of a MOSFET body diode
are very important in systems using it as a freewheeling or
commutating diode. Of particular interest are the reverse re-
covery characteristics which play a major role in determining
switching losses, radiated noise, EMI and RFI.
System switching losses are largely due to the nature of
the body diode itself. The body diode is a minority carrier de-
vice, therefore it has a finite reverse recovery time, trr, due to
the storage of minority carrier charge, QRR, as shown in the
typical reverse recovery wave form of Figure 11. It is this
stored charge that, when cleared from the diode, passes
through a potential and defines an energy loss. Obviously,
repeatedly forcing the diode through reverse recovery further
increases switching losses. Therefore, one would like a
diode with short trr and low QRR specifications to minimize
these losses.
The abruptness of diode reverse recovery effects the
amount of radiated noise, voltage spikes, and current ring-
ing. The mechanisms at work are finite irremovable circuit
parasitic inductances and capacitances acted upon by high
di/dts. The diode’s negative di/dt during ta is directly con-
trolled by the device clearing the stored charge. However,
the positive di/dt during tb is an uncontrollable diode charac-
teristic and is usually the culprit that induces current ringing.
Therefore, when comparing diodes, the ratio of tb/ta serves
as a good indicator of recovery abruptness and thus gives a
comparative estimate of probable noise generated. A ratio of
1 is considered ideal and values less than 0.5 are considered
snappy.
Compared to Motorola standard cell density low voltage
MOSFETs, high cell density MOSFET diodes are faster
(shorter trr), have less stored charge and a softer reverse re-
covery characteristic. The softness advantage of the high
cell density diode means they can be forced through reverse
recovery at a higher di/dt than a standard cell MOSFET
diode without increasing the current ringing or the noise gen-
erated. In addition, power dissipation incurred from switching
the diode will be less due to the shorter recovery time and
lower switching losses.
5
VGS = 0 V
TJ = 25°C
4
3
2
1
0
0.5 0.6 0.7 0.8 0.9
VSD, SOURCE–TO–DRAIN VOLTAGE (VOLTS)
Figure 10. Diode Forward Voltage versus Current
Motorola TMOS Power MOSFET Transistor Device Data
5
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