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87C51F 데이터시트 PDF




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부품번호 87C51F 기능
기능 CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER
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87C51F 데이터시트, 핀배열, 회로
87C51FA 87C51FB 87C51FC 87C51FC-20
CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER
Automotive
Y FX Core Architecture Device
Y Extended Automotive Temperature
Range (b40 C to a125 C Ambient)
Y Available in 12 MHz 16 MHz and
20 MHz Versions
Y High Performance CHMOS EPROM
Y Three 16-Bit Timer Counters
Timer 2 (Up Down Counter)
Y Programmable Counter Array with
High Speed Output
Compare Capture
Pulse Width Modulator
Watchdog Timer Capabilities
Y One-to-Three Level Program Lock
System on EPROM
Y 8K On-Chip User Programmable
EPROM in 87C51FA
Y 16K On-Chip User Programmable
EPROM in 87C51FB
Y 32K On-Chip User Programmable
EPROM in 87C51FC
Y 256 Bytes of On-Chip Data RAM
Y Quick Pulse Programming Algorithm
Y Boolean Processor
Y 32 Programmable I O Lines
Y 7 Interrupt Sources
Y Four Level Interrupt Priority
Y Programmable Serial Channel with
Framing Error Detection
Automatic Address Recognition
Y TTL and CMOS Compatible Logic
Levels
Y 64K External Program Memory Space
Y 64K External Data Memory Space
Y MCS -51 Fully Compatible Instruction
Set
Y Power Saving Idle and Power Down
Modes
Y ONCE (On-Circuit Emulation) Mode
Y RFI Reduction Mode
Y Available in PLCC and PDIP Packages
MEMORY ORGANIZATION
PROGRAM MEMORY Up to 8 Kbytes of the program memory can reside in the 87C51FA On-Chip EPROM
Up to 16 Kbytes of the program memory can reside in the 87C51FB on-chip EPROM Up to 32 Kbytes of the
program memory can reside in the 87C51FC on-chip EPROM In addition the device can address up to 64K of
program memory external to the chip
DATA MEMORY This microcontroller has a 256 x 8 on-chip RAM In addition it can address up to 64 Kbytes of
external data memory
The Intel 87C51FA 87C51FB 87C51FC is a single-chip control-oriented microcontroller which is fabricated on
Intel’s reliable CHMOS EPROM technology Being a member of the MCS-51 family the 87C51FB 87C51FC
uses the same powerful instruction set has the same architecture and is pin-for-pin compatible with the
existing MCS-51 family of products The 87C51FA is an enhanced version of the 87C51 The 87C51FB is an
enhanced version of the 87C51FA The 87C51FC is an enhanced version of the 87C51FB With 8 Kbytes of
program memory in the 87C51FA and 16 Kbytes of program memory in the 87C51FB and 32 Kbytes of
program memory in the 87C51FC it is an even more powerful microcontroller for applications that require
Pulse Width Modulation High Speed I O and up down counting capabilities such as brake and traction
control
For the remainder of this document the 87F51FA 87C51FB and 87C51FC will be referred to as the
87C51FA FB FC
Other brands and names are the property of their respective owners
Information in this document is provided in connection with Intel products Intel assumes no liability whatsoever including infringement of any patent or
copyright for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products Intel retains the right to make
changes to these specifications at any time without notice Microcomputer Products may have minor variations to this specification known as errata
COPYRIGHT INTEL CORPORATION 1995
September 1993
Order Number 270961-003




87C51F pdf, 반도체, 판매, 대치품
AUTOMOTIVE 87C51FA FB FC FC-20
Port 0 is also the multiplexed low-order address and
data bus during accesses to external Program and
Data Memory In this application it uses strong inter-
nal pullups when emitting 1’s and can source and
sink several LS TTL inputs
Port 0 also receives the code bytes during EPROM
programming and outputs the code bytes during
program verification External pullup resistors are re-
quired during program verification
Port 1 Port 1 is an 8-bit bidirectional I O port with
internal pullups The Port 1 output buffers can drive
LS TTL inputs Port 1 pins that have 1’s written to
them are pulled high by the internal pullups and in
that state can be used as inputs As inputs Port 1
pins that are externally pulled low will source current
(IIL on the data sheet) because of the internal pull-
ups
In addition Port 1 serves the functions of the follow-
ing special features of the 87C51FB FC
Port Pin
P1 0
P1 1
P1 2
P1 3
P1 4
P1 5
P1 6
P1 7
Alternate Function
T2 (External Count Input to
Timer Counter 2)
T2EX (Timer Counter 2 Capture
Reload Trigger and Direction Control)
ECI (External Count Input to the PCA)
CEX0 (External I O for Compare
Capture Module 0)
CEX1 (External I O for Compare
Capture Module 1)
CEX2 (External I O for Compare
Capture Module 2)
CEX3 (External I O for Compare
Capture Module 3)
CEX4 (External I O for Compare
Capture Module 4)
Port 1 receives the low-order address bytes during
EPROM programming and verifying
Port 2 Port 2 is an 8-bit bidirectional I O port with
internal pullups The Port 2 output buffers can drive
LS TTL inputs Port 2 pins that have 1’s written to
them are pulled high by the internal pullups and in
that state can be used as inputs As inputs Port 2
pins that are externally pulled low will source current
(IIL on the data sheet) because of the internal pull-
ups
PACKAGES
Part
87C51FA FB FC
Prefix
P
N
Package Type
40-Pin Plastic DIP
44-Pin PLCC
DIP
PAD (PLCC)
270961 – 3
EPROM only
Do not connect reserved pins
270961 – 4
Diagrams are for pin reference only Package sizes are
not to scale
Figure 3 Pin Connections (Top View)
4

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87C51F 전자부품, 판매, 대치품
AUTOMOTIVE 87C51FA FB FC FC-20
DESIGN CONSIDERATION
When the Idle mode is terminated by a hardware
reset the device normally resumes program execu-
tion from where it left off up to two machine cycles
before the internal reset algorithm takes control On-
chip hardware inhibits access to internal RAM in this
event but access to the port pins is not inhibited To
eliminate the possibility of an unexpected write when
Idle is terminated by reset the instruction following
the one that invokes Idle should not be one that
writes to a port pin or to external memory
ONCE MODE
The ONCE (‘‘On-Circuit Emulation’’) Mode facilitates
testing and debugging of systems using the
87C51FA FB FC without removing it from the cir-
cuit The ONCE Mode is invoked by
1 Pull ALE low while the device is in reset and
PSEN is high
2 Hold ALE low as RST is deactivated
While the device is in ONCE Mode the Port 0 pins
float and the other port pins and ALE and PSEN are
weakly pulled high The oscillator circuit remains ac-
tive While the 87C51FA FB FC is in this mode an
emulator or test CPU can be used to drive the circuit
Normal operation is restored when a normal reset is
applied
RFI REDUCTION MODE
The RFI reduction feature can be used only if exter-
nal program memory is not required since this mode
disables the ALE pin during instruction code fetches
By writing a logical one to the LSB of the Auxiliary
Register (address 08EH) the ALE is disabled for in-
struction code fetches and the output is weakly held
high When a logical zero is written the ALE pin is
enabled allowing it to generate the Address Latch
Enable signal This bit is cleared by reset Once dis-
abled ALE remains disabled until it is reset by soft-
ware or until a hardware reset occurs
Mode
Idle
Idle
Power Down
Power Down
Table 2 Status of the External Pins during Idle and Power Down
Program
Memory
ALE
PSEN
PORT0
PORT1
PORT2
Internal
1
1
Data
Data
Data
External
1
1
Float
Data
Address
Internal
0
0
Data
Data
Data
External
0
0
Float
Data
Data
PORT3
Data
Data
Data
Data
NOTE
For more detailed information on the reduced power modes refer to current Embedded Applications Handbook and Applica-
tion Note AP-252 ‘‘Designing with the 80C51BH ’’
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