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87C752 데이터시트 PDF




NXP Semiconductors에서 제조한 전자 부품 87C752은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


PDF 형식의 87C752 자료 제공

부품번호 87C752 기능
기능 80C51 8-bit microcontroller family 2K/64 OTP/ROM/ 5 channel 8 bit A/D/ I2C/ PWM/ low pin count
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87C752 데이터시트, 핀배열, 회로
INTEGRATED CIRCUITS
83C752/87C752
80C51 8-bit microcontroller family
2K/64 OTP/ROM, 5 channel 8 bit A/D, I2C, PWM,
low pin count
Product specification
Supersedes data of 1998 May 01
IC20 Data Handbook
1999 Jul 23
Philips
Semiconductors




87C752 pdf, 반도체, 판매, 대치품
Philips Semiconductors
80C51 8-bit microcontroller family
2K/64 OTP/ROM, 5 channel 8 bit A/D, I2C, PWM, low pin count
PIN CONFIGURATIONS
P3.4/A4 1
P3.3/A3 2
P3.2/A2/A10 3
P3.1/A1/A9 4
P3.0/A0/A8 5
P0.2/VPP 6
P0.1/SDA/OE–PGM 7
P0.0/SCL/ASEL 8
RST 9
PLASTIC
DUAL
IN-LINE
PACKAGE
AND
SHRINK
SMALL
OUTLINE
PACKAGE
X2 10
X1 11
VSS 12
P1.0/ADC0/D0 13
P1.1/ADC1/D1 14
28 VCC
27 P3.5/A5
26 P3.6/A6
25 P3.7/A7
24 P0.4/PWM OUT
23 P0.3
22 P1.7/T0/D7
21 P1.6/INT1/D6
20 P1.5/INT0/D5
19 AVCC
18 AVSS
17 P1.4/ADC4/D4
16 P1.3/ADC3/D3
15 P1.2/ADC2/D2
4 1 26
5 25
PLASTIC
LEADED
CHIP
CARRIER
11 19
12 18
Pin Function
Pin Function
1 P3.4/A4
15 P1.2/ADC2/D2
2 P3.3/A3
16 P1.3/ADC3/D3
3 P3.2/A2/A10
17 P1.4/ADC4/D4
4 P3.1/A1/A9
18 AVSS
5 P3.0/A0/A8
19 AVCC
6 P0.2/VPP
20 P1.5/INT0/D5
7 P0.1/SDA/OE-PGM 21 P1.6/INT1/D6
8 P0.0/SCL/ASEL
22 P1.7/T0/D7
9 RST
23 P0.3
10 X2
24 P0.4/PWM OUT
11 X1
25 P3.7/A7
12 VSS
13 P1.0/ADC0/D0
26 P3.6/A6
27 P3.5/A5
14 P1.1/ADC1/D1
28 VCC
SU00318
Product specification
83C752/87C752
1999 Jul 23
4

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87C752 전자부품, 판매, 대치품
Philips Semiconductors
80C51 8-bit microcontroller family
2K/64 OTP/ROM, 5 channel 8 bit A/D, I2C, PWM, low pin count
Product specification
83C752/87C752
READ
LATCH
INT. BUS
WRITE TO
LATCH
ALTERNATE
OUTPUT
FUNCTION
DQ
P1.X
LATCH
CL Q
VDD
INTERNAL
PULL-UP
P1.X
PIN
READ
LATCH
INT. BUS
WRITE TO
LATCH
ALTERNATE
OUTPUT
FUNCTION
DQ
P0.X
LATCH
CL Q
P0.X
PIN
READ
PIN
ALTERNATE INPUT
FUNCTION
READ
PIN
ALTERNATE INPUT
FUNCTION
Figure 1. Port Bit Latches and I/O Buffers
SU00306
I/O Ports
The I/O pins provided by the 83C752 consist of port 0, port 1, and
port 3.
Port 0
Port 0 is a 5-bit bidirectional I/O port and includes alternate functions
on some pins of this port. Pins P0.3 and P0.4 are provided with
internal pullups while the remaining pins (P0.0, P0.1, and P0.2) have
open drain output structures. The alternate functions for port 0 are:
P0.0
P0.1
P0.4
SCL – the I2C bus clock
SDA – the I2C bus data
PWM – the PWM output
If the alternate functions, I2C and PWM, are not being used, then
these pins may be used as I/O ports.
Port 1
Port 1 is an 8-bit bidirectional I/O port whose structure is identical to
the 80C51, but also includes alternate input functions on all pins.
The alternate pin functions for port 1 are:
P1.0-P1.4 - ADC0-ADC4 - A/D converter analog inputs
P1.5 INT0 - external interrupt 0 input
P1.6 INT1 - external interrupt 1 input
P1.7 - T0 - timer 0 external input
If the alternate functions INT0, INT1, or T0 are not being used, these
pins may be used as standard I/O ports. It is necessary to connect
AVCC and AVSS to VCC and VSS, respectively, in order to use these
pins as standard I/O pins. When the A/D converter is enabled, the
analog channel connected to the A/D may not be used as a digital
input; however, the remaining analog inputs may be used as digital
inputs. They may not be used as digital outputs. While the A/D is
enabled, the analog inputs are floating.
Port 3
Port 3 is an 8-bit bidirectional I/O port whose structure is identical to
the 80C51. Note that the alternate functions associated with port 3
of the 80C51 have been moved to port 1 of the 83C752 (as
applicable). See Figure 1 for port bit configurations.
Counter/Timer Subsystem
The 8XC752 has one counter/timer called timer/counter 0. Its
operation is similar to mode 2 operation on the 80C51, but is
extended to 16 bits with 16 bits of autoload. The controls for this
counter are centralized in a single register called TCON.
A watchdog timer, called Timer I, is for use with the I2C subsystem.
In I2C applications, this timer is dedicated to time-generation and
bus monitoring of the I2C. In non-I2C applications, it is available for
use as a fixed time-base.
Interrupt Subsystem—Fixed Priority
The IP register and the 2-level interrupt system of the 80C51 are
eliminated. The interrupt structure is a seven-source, one-level
interrupt system similar to the 8XC751. Simultaneous interrupt
conditions are resolved by a single-level, fixed priority as follows:
Highest priority: Pin INT0
Counter/timer flag 0
Pin INT1
PWM
Timer I
Serial I2C
Lowest priority: ADC
The vector addresses are as follows:
Source
INT0
TF0
INT1
TIMER I
SIO
ADC
PWM
Vector Address
0003H
000BH
0013H
001BH
0023H
002BH
0033H
Interrupt Control Registers
The 80C51 interrupt enable register is modified to take into account
the different interrupt sources of the 8XC752.
1999 Jul 23
7

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