|
|
PDF PM7367 Data sheet ( Hoja de datos )
| Número de pieza | PM7367 | |
| Descripción | 32 link / 32 Channel Data Link Manager with PCI Interface | |
| Fabricantes | PMC-Sierra | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de PM7367 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
DATA SHEET
PMC-1991499
ISSUE 2
PM7367 FREEDM-32P32
FRAME ENGINE AND DATA LINK MANAGER
PM7367
FREEDM™-32P32
FRAME ENGINE AND DATALINK
MANAGER
DATA SHEET
ISSUE 2: AUGUST 2001
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
1 page  
DATA SHEET
PMC-1991499
9
10
11
12
13
14
15
16
17
18
PM7367 FREEDM-32P32
ISSUE 2
FRAME ENGINE AND DATA LINK MANAGER
NORMAL MODE REGISTER DESCRIPTION ........................................78
9.1 PCI HOST ACCESSIBLE REGISTERS .......................................78
PCI CONFIGURATION REGISTER DESCRIPTION ............................250
10.1 PCI CONFIGURATION REGISTERS.........................................250
TEST FEATURES DESCRIPTION .......................................................261
11.1 TEST MODE REGISTERS ........................................................261
11.2 JTAG TEST PORT .....................................................................262
11.2.1 IDENTIFICATION REGISTER .....................................263
11.2.2 BOUNDARY SCAN REGISTER ..................................263
OPERATIONS ......................................................................................277
12.1 EQUAD CONNECTIONS...........................................................277
12.2 TOCTL CONNECTIONS ............................................................277
12.3 JTAG SUPPORT........................................................................278
FUNCTIONAL TIMING .........................................................................284
13.1 RECEIVE LINK INPUT TIMING .................................................284
13.2 TRANSMIT LINK OUTPUT TIMING...........................................285
13.3 PCI INTERFACE ........................................................................287
13.4 BERT INTERFACE ....................................................................296
ABSOLUTE MAXIMUM RATINGS........................................................298
D.C. CHARACTERISTICS....................................................................299
FREEDM-32P32 TIMING CHARACTERISTICS...................................301
ORDERING AND THERMAL INFORMATION ......................................307
MECHANICAL INFORMATION.............................................................308
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMER’S INTERNAL USE iv
5 Page 
DATA SHEET
PMC-1991499
ISSUE 2
PM7367 FREEDM-32P32
FRAME ENGINE AND DATA LINK MANAGER
LIST OF FIGURES
FIGURE 1 – HDLC FRAME...............................................................................30
FIGURE 2 – CRC GENERATOR.......................................................................31
FIGURE 3 – PARTIAL PACKET BUFFER STRUCTURE ..................................35
FIGURE 4 – RECEIVE PACKET DESCRIPTOR...............................................37
FIGURE 5 – RECEIVE PACKET DESCRIPTOR TABLE...................................40
FIGURE 6 – RPDRF AND RPDRR QUEUES ...................................................42
FIGURE 7 – RPDRR QUEUE OPERATION......................................................44
FIGURE 8 – RECEIVE CHANNEL DESCRIPTOR REFERENCE TABLE.........45
FIGURE 9 – GPIC ADDRESS MAP ..................................................................52
FIGURE 10 – TRANSMIT DESCRIPTOR .........................................................54
FIGURE 11 – TRANSMIT DESCRIPTOR TABLE .............................................58
FIGURE 12 – TDRR AND TDRF QUEUES .......................................................60
FIGURE 13 – TRANSMIT CHANNEL DESCRIPTOR REFERENCE TABLE ....62
FIGURE 14 – TD LINKING................................................................................65
FIGURE 15 – PARTIAL PACKET BUFFER STRUCTURE ................................69
FIGURE 16 – INPUT OBSERVATION CELL (IN_CELL) .................................274
FIGURE 17 – OUTPUT CELL (OUT_CELL) ...................................................275
FIGURE 18 – BI-DIRECTIONAL CELL (IO_CELL) .........................................275
FIGURE 19 – LAYOUT OF OUTPUT ENABLE AND BI-DIRECTIONAL CELLS
..............................................................................................................276
FIGURE 20 – BOUNDARY SCAN ARCHITECTURE ......................................278
FIGURE 21 – TAP CONTROLLER FINITE STATE MACHINE ........................280
FIGURE 22 – UNCHANNELISED RECEIVE LINK TIMING ............................284
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMER’S INTERNAL USE x
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet PM7367.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| PM7364 | Frame Engine and Datalink Manager | PMC-Sierra |
| PM7366 | FRAME ENGINE AND DATA LINK MANAGER | PMC-Sierra |
| PM7367 | 32 link / 32 Channel Data Link Manager with PCI Interface | PMC-Sierra |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |