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Número de pieza | PM7381 | |
Descripción | Frame Engine and Data Link Manager | |
Fabricantes | PMC-Sierra | |
Logotipo | ||
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PMC-1990263
ISSUE 6
PM7381 FREEDM-32A672
32 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER WITH
ANY-PHY PACKET INTERFACE
PM7381
FREEDM™-32A672
FRAME ENGINE AND DATALINK
MANAGER 32A672
DATA SHEET
PROPRIETARY AND CONFIDENTIAL
ISSUE 6: AUGUST 2001
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
1 page DATASHEET
PMC-1990263
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PM7381 FREEDM-32A672
ISSUE 6
32 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER WITH
ANY-PHY PACKET INTERFACE
11.2 JTAG SUPPORT........................................................................175
FUNCTIONAL TIMING..........................................................................182
12.1 RECEIVE H-MVIP LINK TIMING ...............................................182
12.2 TRANSMIT H-MVIP LINK TIMING .............................................183
12.3 RECEIVE NON H-MVIP LINK TIMING.......................................184
12.4 TRANSMIT NON H-MVIP LINK TIMING ....................................186
12.5 RECEIVE APPI TIMING .............................................................187
12.6 TRANSMIT APPI TIMING ..........................................................191
12.7 BERT INTERFACE.....................................................................194
ABSOLUTE MAXIMUM RATINGS........................................................196
D.C. CHARACTERISTICS....................................................................197
FREEDM-32A672 TIMING CHARACTERISTICS .................................199
ORDERING AND THERMAL INFORMATION ......................................213
MECHANICAL INFORMATION.............................................................214
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE iv
5 Page PM7381 FREEDM-32A672
DATASHEET
PMC-1990263
ISSUE 6
32 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER WITH
ANY-PHY PACKET INTERFACE
supports the validation of both CRC-CCITT and CRC-32 frame check
sequences.
· For each channel, the receiver checks for packet abort sequences, octet
aligned packet length and for minimum and maximum packet length. The
receiver supports filtering of packets that are larger than a user specified
maximum value.
· Alternatively, for each channel, the receiver supports a transparent mode
where each octet is transferred transparently on the receive APPI. For
channelised links, the octets are aligned with the receive time-slots.
· For each channel, time-slots are selectable to be in 56 kbits/s format or 64
kbits/s clear channel format.
· For each channel, the HDLC transmitter supports programmable flag
sequence generation, bit stuffing and frame check sequence generation. The
transmitter supports the generation of both CRC-CCITT and CRC-32 frame
check sequences. The transmitter also aborts packets under the direction of
the external controller or automatically when the channel underflows.
· Alternatively, for each channel, the transmitter supports a transparent mode
where each octet is inserted transparently from the transmit APPI. For
channelised links, the octets are aligned with the transmit time-slots.
· Supports per-channel configurable APPI burst sizes of up to 256 bytes for
transfers of packet data.
· Provides 32 Kbytes of on-chip memory for partial packet buffering in both the
transmit and the receive directions. This memory may be configured to
support a variety of different channel configurations from a single channel with
32 Kbytes of buffering to 672 channels, each with a minimum of 48 bytes of
buffering.
· Provides a 16 bit microprocessor interface for configuration and status
monitoring.
· Provides a standard 5 signal P1149.1 JTAG test port for boundary scan board
test purposes.
· Supports 5 Volt tolerant I/O (except APPI).
· Low power 2.5 Volt 0.25 mm CMOS technology.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 2
11 Page |
Páginas | Total 70 Páginas | |
PDF Descargar | [ Datasheet PM7381.PDF ] |
Número de pieza | Descripción | Fabricantes |
PM7380 | FRAME ENGINE AND DATA LINK MANAGER 32P672 | PMC-Sierra |
PM7381 | Frame Engine and Data Link Manager | PMC-Sierra |
PM7382 | Frame Engine and Data Link Manager 32P256 | PMC-Sierra |
PM7383 | FRAME ENGINE AND DATA LINK MANAGER 32A256 | PMC-Sierra |
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