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PDF PM7383 Data sheet ( Hoja de datos )
| Número de pieza | PM7383 | |
| Descripción | FRAME ENGINE AND DATA LINK MANAGER 32A256 | |
| Fabricantes | PMC-Sierra | |
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Hay una vista previa y un enlace de descarga de PM7383 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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RELEASED
DATASHEET
PMC-2010336
ISSUE 1
PM7383 FREEDM-32A256
FRAME ENGINE AND DATA LINK MANAGER 32A256
PM7383
FREEDM™-32A256
FRAME ENGINE AND DATALINK
MANAGER 32A256
DATASHEET
PROPRIETARY AND CONFIDENTIAL
RELEASED
ISSUE 2: AUGUST 2001
PMC-Sierra, Inc.
105 - 8555 Baxter Place Burnaby, BC Canada V5A 4V7 604 .415.6000
1 page  
RELEASED
DATASHEET
PMC-2010336
ISSUE 1
PM7383 FREEDM-32A256
FRAME ENGINE AND DATA LINK MANAGER 32A256
LIST OF FIGURES
FIGURE 1 – H-MVIP PROTOCOL.....................................................................44
FIGURE 2 – HDLC FRAME...............................................................................45
FIGURE 3 – CRC GENERATOR.......................................................................45
FIGURE 4 – PARTIAL PACKET BUFFER STRUCTURE ..................................51
FIGURE 5 – PARTIAL PACKET BUFFER STRUCTURE ..................................58
FIGURE 6 – INPUT OBSERVATION CELL (IN_CELL) ...................................176
FIGURE 7 – OUTPUT CELL (OUT_CELL)......................................................177
FIGURE 8 – BI-DIRECTIONAL CELL (IO_CELL)............................................178
FIGURE 9 – LAYOUT OF OUTPUT ENABLE AND BI-DIRECTIONAL CELLS179
FIGURE 10 – BOUNDARY SCAN ARCHITECTURE ......................................181
FIGURE 11 – TAP CONTROLLER FINITE STATE MACHINE.........................183
FIGURE 12 – RECEIVE 8.192 MBPS H-MVIP LINK TIMING .........................187
FIGURE 13 – RECEIVE 2.048 MBPS H-MVIP LINK TIMING .........................188
FIGURE 14 – TRANSMIT 8.192 MBPS H-MVIP LINK TIMING .......................189
FIGURE 15 – TRANSMIT 2.048 MBPS H-MVIP LINK TIMING .......................189
FIGURE 16 – UNCHANNELISED RECEIVE LINK TIMING ............................190
FIGURE 17 – CHANNELISED T1/J1 RECEIVE LINK TIMING........................191
FIGURE 18 – CHANNELISED E1 RECEIVE LINK TIMING ............................191
FIGURE 19 – UNCHANNELISED TRANSMIT LINK TIMING ..........................192
FIGURE 20 – CHANNELISED T1/J1 TRANSMIT LINK TIMING .....................192
FIGURE 21 – CHANNELISED E1 TRANSMIT LINK TIMING..........................193
FIGURE 22 – RECEIVE APPI TIMING (NORMAL TRANSFER) .....................193
PROPRIETARY AND CONFIDENTIAL
iv
5 Page 
RELEASED
DATASHEET
PMC-2010336
ISSUE 1
PM7383 FREEDM-32A256
FRAME ENGINE AND DATA LINK MANAGER 32A256
· 329 pin plastic ball grid array (PBGA) package.
PROPRIETARY AND CONFIDENTIAL
3
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet PM7383.PDF ] | |
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