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부품번호 NBSG11MNR2 기능
기능 2.5V/3.3VSiGe 1:2 Differential Clock Driver with RSECL* Outputs
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NBSG11MNR2 데이터시트, 핀배열, 회로
NBSG11
2.5V/3.3V SiGe 1:2
Differential Clock Driver
with RSECL* Outputs
*Reduced Swing ECL
The NBSG11 is a 1-to-2 differential fanout buffer, optimized for
low skew and ultra-low JITTER.
Inputs incorporate internal 50 W termination resistors and accept
NECL (Negative ECL), PECL (Positive ECL), CML, LVCMOS,
LVTTL, or LVDS. Outputs are RSECL (Reduced Swing ECL),
400 mV.
Maximum Input Clock Frequency up to 12 GHz Typical
Maximum Input Data Rate up to 12 Gb/s Typical
30 ps Typical Rise and Fall Times
125 ps Typical Propagation Delay
RSPECL Output with Operating Range: VCC = 2.375 V to 3.465 V
with VEE = 0 V
RSNECL Output with RSNECL or NECL Inputs with
Operating Range: VCC = 0 V with VEE = -2.375 V to -3.465 V
RSECL Output Level (400 mV Peak-to-Peak Output), Differential
Output Only
50 W Internal Input Termination Resistors
Compatible with Existing 2.5 V/3.3 V LVEP, EP, and LVEL Devices
http://onsemi.com
MARKING
DIAGRAM*
FCBGA-16
BA SUFFIX
CASE 489
SG
11
LYW
QFN-16
MN SUFFIX
CASE 485G
SG11
ALYW
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
*For further details, refer to Application Note
AND8002/D
ORDERING INFORMATION
Device
Package
Shipping
NBSG11BA
NBSG11BAR2
4x4 mm
FCBGA-16
4x4 mm
FCBGA-16
100 Units / Tray
500 / Tape & Reel
NBSG11MN
NBSG11MNR2
3x3 mm
QFN-16
3x3 mm
QFN-16
123 Units / Rail
3000 / Tape & Reel
Board
NBSG11BAEVB
Description
NBSG11BA Evaluation Board
© Semiconductor Components Industries, LLC, 2003
April, 2003 - Rev. 6
1
Publication Order Number:
NBSG11/D




NBSG11MNR2 pdf, 반도체, 판매, 대치품
NBSG11
Table 4. MAXIMUM RATINGS (Note 5)
Symbol
Parameter
Condition 1
Condition 2
VCC
VEE
VI
VINPP
Iout
Positive Power Supply
Negative Power Supply
Positive Input
Negative Input
Differential Input Voltage
Output Current
VEE = 0 V
VCC = 0 V
VEE = 0 V
VCC = 0 V
VI VCC
VI VEE
|D - D| VCC - VEE w 2.8 V
VCC - VEE < 2.8 V
Continuous
Surge
TA Operating Temperature Range
16 FCBGA
16 QFN
Tstg Storage Temperature Range
qJA Thermal Resistance (Junction-to-Ambient) 0 LFPM
(Note 6)
500 LFPM
0 LFPM
500 LFPM
16 FCBGA
16 FCBGA
16 QFN
16 QFN
qJC
Thermal Resistance (Junction-to-Case)
1S2P (Note 6)
2S2P (Note 7)
16 FCBGA
16 QFN
Tsol Wave Solder
< 15 Seconds
5. Maximum Ratings are those values beyond which device damage may occur.
6. JEDEC standard multilayer board - 1S2P (1 signal, 2 power).
7. JEDEC standard multilayer board - 2S2P (2 signal, 2 power) with 8 filled thermal vias under exposed pad.
Rating
3.6
-3.6
3.6
-3.6
2.8
|VCC - VEE|
25
50
-40 to +70
-40 to +85
-65 to +150
108
86
41.6
35.2
5.0
4.0
225
Units
V
V
V
V
V
V
mA
mA
°C
°C
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C
Table 5. DC CHARACTERISTICS, INPUT WITH RSPECL OUTPUT VCC = 2.5 V; VEE = 0 V (Note 8)
-40 °C
25°C
70°C(BGA)/85°C(QFN)**
Symbol
Characteristic
Min Typ Max Min Typ Max Min Typ Max Unit
IEE
VOH
VOUTPP
VIH
Negative Power Supply Current
Output HIGH Voltage (Note 9)
Output Amplitude Voltage
Input HIGH Voltage (Single-Ended)
(Note 11)
45
1450
350
VCC-
1435
mV
60
1530
410
VCC-
1000
mV*
75
1575
525
VCC
45
1525
350
VCC-
1435
mV
60 75
1565 1600
410 525
VCC- VCC
1000
mV*
45
1550
350
VCC-
1435
mV
60
1590
410
VCC-
1000
mV*
75
1625
525
VCC
mA
mV
mV
V
VIL
Input LOW Voltage (Single-Ended)
VIH- VCC-
VIH-
VIH- VCC- VIH- VIH- VCC- VIH-
V
(Note 12)
2.5 V 1400 150 mV 2.5 V 1400 150 2.5 V 1400 150
mV*
mV* mV
mV* mV
VIHCMR Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 10)
1.2
2.5 1.2
2.5 1.2
2.5 V
RTIN
Internal Input Termination Resistor
45 50 55 45 50 55 45 50 55 W
IIH Input HIGH Current (@ VIH, VIHMAX)
80 150
80 150
80 150 mA
IIL Input LOW Current (@ VIL, VILMIN)
25 100
25 100
25 100 mA
NOTE: SiGe circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The
circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained.
8. Input and output parameters vary 1:1 with VCC. VEE can vary +0.125 V to -0.965 V.
9. All loading with 50 W to VCC - 2.0 V. VOH/VOL measured at VIH/VIL.
10. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
11. VIH cannot exceed VCC.
12. VIL always VEE.
*Typicals used for testing purposes.
**The device packaged in FCBGA-16 have maximum temperature specification of 70°C and devices packaged in QFN-16 have maximum
temperature specification of 85°C.
http://onsemi.com
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NBSG11MNR2 전자부품, 판매, 대치품
NBSG11
Table 9. AC CHARACTERISTICS for QFN-16 VCC = 0 V; VEE = -3.465 V to -2.375 V or VCC = 2.375 V to 3.465 V; VEE = 0 V
-40 °C
25°C
85°C
Symbol
fmax
tPLH,
tPHL
tSKEW
Characteristic
Maximum Frequency
(See Figure 4. Fmax/JITTER) (Note 28)
Propagation Delay to
Output Differential
Duty Cycle Skew (Note 29)
Within-Device Skew (Note 30)
Device-to-Device Skew (Note 31)
Min Typ Max Min Typ Max Min Typ Max Unit
10.5 12
10.5 12
10.5 12
GHz
90 125 160 90 125 160 90 125 160 ps
3 15
6 15
25 50
3 15
6 15
25 50
3 15 ps
6 15
25 50
tJITTER
VINPP
RMS Random Clock Jitter
fin < 10 GHz
Peak-to-Peak Data Dependent Jitter
fin < 10 Gb/s
0.2
TBD
1
0.2
TBD
1
0.2
TBD
1
ps
Input Voltage Swing/Sensitivity
(Differential Configuration) (Note 32)
75
2600 75
2600 75
2600 mV
tr Output Rise/Fall Times
tf (20% - 80%) @ 1 GHz
Q, Q 15 30 55 20 30 55 20 30 55 ps
28. Measured using a 500 mV source, 50% duty cycle clock source. All loading with 50 W to VCC-2.0 V. For minimum fmax value of 10.5 GHz,
output amplitude is approximately 200 mV (as shown in Figure 4, where output P-P spec is shown as a minimum/guarantee of around
150 mV). Input edge rates 40 ps (20% - 80%).
29. See Figure 5. tSKEW = |tPLH - tPHL| for a nominal 50% Differential Clock Input Waveform.
30. Within-Device skew is defined as identical transitions on similar paths through a device.
31. Device-to-device skew for identical transitions at identical VCC levels.
32. VINPP (MAX) cannot exceed VCC - VEE.
600
9.5
500 8.5
OUTPUT AMP.
7.5
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INPUT FREQUENCY (GHz)
Figure 4. Output Voltage Amplitude (VOUTPP) / RMS Jitter vs.
Input Frequency (fin) at Ambient Temperature (Typical)
http://onsemi.com
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NBSG11MNR2

2.5V/3.3VSiGe 1:2 Differential Clock Driver with RSECL* Outputs

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