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NBSG16M 데이터시트 PDF




ON에서 제조한 전자 부품 NBSG16M은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


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부품번호 NBSG16M 기능
기능 2.5V/3.3VMultilevel Input to CML Clock/Data Receiver/Driver/Translator Buffer
제조업체 ON
로고 ON 로고


NBSG16M 데이터시트 를 다운로드하여 반도체의 전기적 특성과 매개변수에 대해 알아보세요.




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NBSG16M 데이터시트, 핀배열, 회로
NBSG16M
2.5V/3.3V Multilevel Input
to CML Clock/Data
Receiver/Driver/Translator
Buffer
The NBSG16M is a differential current mode logic (CML)
receiver/driver/translator buffer. The device is functionally equivalent
to the EP16, LVEP16, or SG16 devices with CML output structure and
lower EMI capabilities.
Inputs incorporate internal 50 W termination resistors and accept
LVNECL (Negative ECL), LVPECL (Positive ECL), LVTTL,
LVCMOS, CML, or LVDS. The CML output structure contains
internal 50 W source termination resistor to VCC. The device
generates 400 mV output amplitude with 50 W receiver resistor to
VCC.
The VBB pin is internally generated voltage supply available to this
device only. For all single−ended input conditions, the unused
complementary differential input is connected to VBB as a switching
reference voltage. VBB may also rebias AC coupled inputs. When
used, decouple VBB via a 0.01 mF capacitor and limit current sourcing
or sinking to 0.5 mA. When not used, VBB output should be left open.
Maximum Input Clock Frequency > 10 GHz Typical
Maximum Input Data Rate > 10 Gb/s Typical
120 ps Typical Propagation Delay
35 ps Typical Rise and Fall Times
Positive CML Output with Operating Range: VCC = 2.375 V to
3.465 V with VEE = 0 V
Negative CML Output with RSNECL or NECL Inputs with
Operating Range: VCC = 0 V with VEE = −2.375 V to −3.465 V
CML Output Level; 400 mV Peak−to−Peak Output with
50 W Receiver Resistor to VCC
50 W Internal Input and Output Termination Resistors
Compatible with Existing 2.5 V/3.3 V LVEP, EP, LVEL
and SG Devices
VBB Reference Voltage Output
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MARKING
DIAGRAM*
QFN−16
MN SUFFIX
CASE 485G
SG
16M
ALYW
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
Device
Package
Shipping
NBSG16MMN
3x3 mm
QFN−16
123 Units / Rail
NBSG16MMNR2
3x3 mm 3000/Tape & Reel
QFN−16
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2004
April, 2004 − Rev. 3
1
Publication Order Number:
NBSG16M/D




NBSG16M pdf, 반도체, 판매, 대치품
NBSG16M
Table 4. MAXIMUM RATINGS
Symbol
Parameter
Condition 1
Condition 2
Rating
Unit
s
VCC
VEE
VI
VINPP
Positive Power Supply
Negative Power Supply
Positive Input
Negative Input
Differential Input Voltage |D − D|
VEE = 0 V
VCC = 0 V
VEE = 0 V
VCC = 0 V
VCC − VEE w 2.8 V
VCC − VEE < 2.8 V
VI v VCC
VI w VEE
3.6
−3.6
3.6
−3.6
2.8
|VCC − VEE|
V
V
V
V
V
IIN Input Current Through RT (50 W Resistor) Static
Surge
45 mA
80 mA
Iout Output Current
Continuous
Surge
25 mA
50 mA
IBB VBB Sink/Source
TA Operating Temperature Range
Tstg Storage Temperature Range
qJA Thermal Resistance (Junction−to−Ambient) 0 lfpm
(Note 5)
500 lfpm
QFN−16
QFN−16
1.0
−40 to +85
−65 to +150
42
35
mA
°C
°C
°C/W
°C/W
qJC
Thermal Resistance (Junction−to−Case)
1S2P (Note 5)
QFN−16
4.0 °C/W
Tsol Wave Solder
< 15 sec.
225 °C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not im-
plied, damage may occur and reliability may be affected.
5. JEDEC standard multilayer board − 1S2P (1 signal, 2 power)
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NBSG16M 전자부품, 판매, 대치품
NBSG16M
Table 7. DC CHARACTERISTICS, NEGATIVE CML OUTPUT VCC = 0 V; VEE = −3.465 to −2.375 V (Note 12)
−40°C
25°C
85°C
Symbol
ICC
VOH
Characteristic
Positive Power Supply Current
Output HIGH Voltage (Note 13)
Min
37
VCC
40
Typ
43
VCC
10
Max
51
VCC
Min
37
VCC
40
Typ
43
VCC
10
Max
51
VCC
Min
37
VCC
40
Typ
43
VCC
10
Max
51
VCC
Unit
mA
mV
VOL Output LOW Voltage (Note 12)
VCC − VCC
400 330
VCC − VCC
400 330
VCC − VCC − mV
400 330
VIH Input HIGH Voltage
(Single−Ended) (Note 13)
VEE + VCC − VCC VEE + VCC − VCC VEE + VCC − VCC
1.275 1.0*
1.275 1.0*
1.275 1.0*
V
VIL Input LOW Voltage
(Single−Ended) (Note 13)
VEE VCC − VIH
VEE VCC − VIH
VEE VCC − VIH
V
1.4* 0.150
1.4* 0.150
1.4* 0.150
VBB
VIHCMR
ECL Reference Voltage Output
Input HIGH Voltage Common
Mode Range (Note 14)
(Differential Configuration)
−1425 −1330 −1235 −1425 −1330 −1235 −1425 −1330 −1235 mV
VEE+1.2
VCC
VEE+1.2
VCC
VEE+1.2
VCC
V
RTIN
Internal Input Termination Resistor 45
50
55
45
50
55
45
50
55 W
RTOUT Internal Output Termination
Resistor
45 50 55 45 50 55 45 50 55 W
IIH Input HIGH Current (@ VIH)
IIL Input LOW Current (@ VIL)
60 100
25 50
60 100
25 50
60 100 mA
25 50 mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification
limit values are applied individually under normal operating conditions and not valid simultaneously.
12. Input and output parameters vary 1:1 with VCC.
13. All loading with 50 W to VCC.
14. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differen-
tial input signal.
*Typicals used for testing purposes.
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부품번호상세설명 및 기능제조사
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NBSG16M

2.5V/3.3VMultilevel Input to CML Clock/Data Receiver/Driver/Translator Buffer

ON
ON

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