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PDF NCP1500 Data sheet ( Hoja de datos )

Número de pieza NCP1500
Descripción Dual Mode PWM/Linear BUCK Converter
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NCP1500
Dual Mode PWM/Linear
BUCK Converter
The NCP1500 is a dual mode converter that operates as either a
pulse width modulated (PWM) buck converter or as a linear regulator.
The converter automatically transitions between the two modes. The
converter operates as a PWM when a synchronization signal is present
at the sync input. The converter operates as a linear regulator in the
absence of a synchronization signal. The PWM mode offers excellent
performance at normal to heavy loads at the sacrifice of output ripple
voltage. The linear mode offers excellent noise rejection at the
sacrifice of system efficiency. The user is able to select which mode
will give the best performance for a given operating condition.
Internal protection features include thermal shutdown with hysteresis
and cycle−by−cycle current limit in the PWM mode. Additionally, the
converter transitions into PFM mode at very light loads if a
synchronization signal is present and an output overvoltage condition
is detected.
PWM Features
Current Mode Control with Cycle−by−Cycle Current Limit
Nominal Synchronization Frequency of 270 to 630 kHz
Built−in Slope Compensation
Linear Regulator Features
Low Output Noise
Overall Features
Thermal Shutdown with Hysteresis
Digitally Programmable Output Voltage Between 4 Voltages:
1.0, 1.3, 1.5, and 1.8
Fast Transient Response
Input Voltage Range From 2.7 V to 5.4 V
Space Saving Micro8 Package
Low Shutdown Current of 0.18 mA Typical
Pb−Free Package is Available
Typical Applications
Baseband Supplies for Portable Handsets
PDAs
Supplies for DSP Circuitry
L
COUT
1 SHD
2 SYN
3 VO
4 LX
MBRM120
CB0 8
CB1 7
GND 6
VIN 5
CIN VIN
L = 15 mH
CIN = 10 mF
COUT = 10 mF
Figure 1. Typical Operating Circuit
© Semiconductor Components Industries, LLC, 2004
February, 2004 − Rev. 4
1
http://onsemi.com
8
1
MARKING
DIAGRAM
Micro8t
(MSOP−8)
DM SUFFIX
CASE 846A
8
1500
AYW
1
A = Assembly Location
Y = Year
W = Work Week
PIN CONNECTIONS
SHD
SYN
VO
LX
1
2
3
4
(Top View)
8 CB0
7 CB1
6 GND
5 VIN
ORDERING INFORMATION
Device
Package
Shipping
NCP1500DMR2
Micro8
4000 Tape/Reel
NCP1500DMR2G Micro8
(Pb−Free)
4000 Tape/Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Publication Order Number:
NCP1500/D

1 page




NCP1500 pdf
NCP1500
DETAILED OPERATING DESCRIPTION
Introduction
The NCP1500 is a dual mode regulator intended for use
in baseband supplies for portable equipment. Its unique
features provide power to the baseband circuitry while, at
the same time save valuable battery energy. When the
handset is idle, the user can activate the linear regulator
function. In this mode, the regulator provides a regulated
low current, low noise output voltage keeping the baseband
circuit biased. When the handset is in its normal operating
mode, the regulator synchronizes to the baseband clock and
turns into a switching regulator. This allows the regulator to
provide efficient power to the baseband circuit.
Operating Description
Synchronization Protocol and Mode Selection
The NCP1500 has a SYNC input. The device operates at
a fixed switch frequency determined by the frequency of the
synchronization signal applied. The part automatically
operates in PWM mode after synchronization pulses are
present for several cycles. The NCP1500 will output 2
pulses when a sync signal is present. The first is a PWM
pulse. This pulse ‘sets’ a latch that initiates output switch
conduction. The width of this pulse controls the minimum
on time in PWM mode. The second signal is a slope
compensation ramp. A ramp signal is generated. This signal
is summed with the current information before being fed
into the PWM comparator. The purpose of this circuit is to
provide stable operation at output switch duty cycles in
excess of 50%. The device automatically switches to linear
mode when the SYNC signal is removed for approximately
6.0 msec. It is recommended that the sync signal be
externally pulled low to enable the linear mode. Pulling
the pin high or open may cause portions of the circuit to
remain active, increasing the total current consumption of
the IC. The threshold level of the SYNC signal is typically
1.3 V. The duty cycle of the sync signal must be within 20
to 80%.
Internal CLK Signal
VIN
Figure 3 shows the waveform when the SYNC signal is
applied. After several cycles, the MODE select changes and
PWM operation is activated with the internal clock signal.
Reference/Shutdown
The NCP1500 uses an internal reference, typically at
0.8 V. An external shutdown pin is provided. When this pin
is pulled low, the reference and other circuitry are disabled,
placing the part into a low quiescent current standby mode.
In this mode, the pass device is off and the output voltage
will be zero. The typical standby current is 0.18 mA.
Error Amplifier/Output Voltage Program
A fully compensated error amplifier is provided inside the
NCP1500. No external circuitry is required to stabilize the
operation of the NCP1500. The error amplifier provides an
error signal to both the PWM circuit and the linear regulator
circuit. The output of the error amplifier is directly
connected to the linear regulator control circuit. However,
the output of the error amplifier is connected first to a
subtraction circuit before going to the input of the PWM
comparator. The subtraction circuit is activated only during
an over current condition. During this condition, a signal
proportional to the amount of over current is subtracted from
the error amplifier signal. This subtraction results in a lower
signal applied to the PWM comparator, thus lowering the
output duty cycle.
The output voltage is digitally programmable up to four
voltages. Two program pins are provided to accomplish this
task. The program pins control a mux, which switch a bank
of resistors. The appropriate resistor bank is switched to the
error amplifier input, depending on the program input. The
following truth table can be used to program the output
voltage:
CB0
0
0
1
1
CB1
0
1
0
1
Output Voltage
1.5
1.8
1.3
1.0
Both program pins are internally pulled low. Thus, if the
0 input pins are left open, the output voltage will be 1.5 V.
External SYNC Signal
3.0
0
0 10
TIME (m)
Figure 3. Timing Diagram of the SYNC Signal
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NCP1500 arduino
NCP1500
PACKAGE DIMENSIONS
Micro8
(MSOP−8)
DM SUFFIX
CASE 846A−02
ISSUE F
−A−
K −B−
PIN 1 ID G
SEATING
−T− PLANE
0.038 (0.0015)
D 8 PL
0.08 (0.003) M T B S A S
C
H
J
L
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS. MOLD FLASH,
PROTRUSIONS OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.25 (0.010)
PER SIDE.
5. 846A−01 OBSOLETE, NEW STANDARD 846A−02.
MILLIMETERS
INCHES
DIM MIN MAX MIN MAX
A 2.90 3.10 0.114 0.122
B 2.90 3.10 0.114 0.122
C −−− 1.10 −−− 0.043
D 0.25 0.40 0.010 0.016
G 0.65 BSC
0.026 BSC
H 0.05 0.15 0.002 0.006
J 0.13 0.23 0.005 0.009
K 4.75 5.05 0.187 0.199
L 0.40 0.70 0.016 0.028
SOLDERING FOOTPRINT*
1.04
8X 0.041
0.38
0.015 8X
3.20
0.126
4.24 5.28
0.167 0.208
0.65
6X 0.0256
ǒ ǓSCALE 8:1
mm
inches
Micro8E
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
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