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PDF NDB4050L Data sheet ( Hoja de datos )
| Número de pieza | NDB4050L | |
| Descripción | N-Channel Logic Level Enhancement Mode Field Effect Transistor | |
| Fabricantes | Fairchild | |
| Logotipo |  |
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April 1996
NDP4050L / NDB4050L
N-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
Features
These logic level N-Channel enhancement mode power field
effect transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high density
process has been especially tailored to minimize on-state
resistance, provide superior switching performance, and
withstand high energy pulses in the avalanche and
commutation modes. These devices are particularly suited for
low voltage applications such as automotive, DC/DC
converters, PWM motor controls, and other battery powered
circuits where fast switching, low in-line power loss, and
resistance to transients are needed.
15A, 50V. RDS(ON) = 0.1Ω @ VGS = 5V
Low drive requirements allowing operation directly from logic
drivers. VGS(TH) < 2.0V.
Critical DC electrical parameters specified at elevated
temperature.
Rugged internal source-drain diode can eliminate the need
for an external Zener diode transient suppressor.
175°C maximum junction temperature rating.
High density cell design for extremely low RDS(ON).
TO-220 and TO-263 (D2PAK) package for both through hole
and surface mount applications.
_______________________________________________________________________________
D
G
S
Absolute Maximum Ratings
Symbol Parameter
TC = 25°C unless otherwise noted
NDP4050L
VDSS Drain-Source Voltage
VDGR
Drain-Gate Voltage (RGS < 1 MΩ)
VGSS Gate-Source Voltage - Continuous
- Nonrepetitive (tP < 50 µs)
ID Drain Current - Continuous
- Pulsed
PD Total Power Dissipation @ TC = 25°C
Derate above 25°C
TJ,TSTG
TL
Operating and Storage Temperature
Maximum lead temperature for soldering
purposes, 1/8" from case for 5 seconds
50
50
± 16
± 25
15
45
50
0.33
-65 to 175
275
NDB4050L
Units
V
V
V
A
W
W/°C
°C
°C
© 1997 Fairchild Semiconductor Corporation
NDP4050L Rev. B / NDB4050L Rev. C
1 page  
Typical Electrical Characteristics (continued)
1.15
1.125
I D = 250µA
1.1
1.075
1.05
1.025
1
0.975
0.95
0.925
0.9
-50
-25
0 25 50 75 100 125 150 175
TJ , JUNCTION TEMPERATURE (°C)
Figure 7. Breakdown Voltage Variation with
Temperature
20
10
5 VGS = 0V
1
0.5 TJ = 125°C
0.1
25°C
-55°C
0.01
0.001
0.2
0.4 0.6 0.8 1 1.2
VSD , BODY DIODE FORWARD VOLTAGE (V)
1.4
Figure 8. Body Diode Forward Voltage Variation
with Current and Temperature
1500
1000
500
C iss
200 C oss
100
50 f = 1 MHz
VGS = 0V
C rss
20
0.1
0.2
0.5 1
2
5 10
V , DRAIN TO SOURCE VOLTAGE (V)
DS
20
50
Figure 9. Capacitance Characteristics
10
ID = 7.5A
8
6
VDS = 12V
48V
24V
4
2
0
0 4 8 12 16
Q g , GATE CHARGE (nC)
Figure 10. Gate Charge Characteristics
20
VIN
VG E N
RGEN
G
RGS
VDD
RL
D
VOUT
DUT
S
Figure 11. Switching Test Circuit
t d(on)
ton
tr
90%
td(off)
toff
tf
90%
VO U T
VIN
10%
10%
50%
10%
90%
INVERTED
50%
PULSE W IDTH
Figure 12. Switching Waveforms
NDP4050L Rev. B / NDB4050L Rev. C
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet NDB4050L.PDF ] | |
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