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PDF AV2188 Data sheet ( Hoja de datos )
| Número de pieza | AV2188 | |
| Descripción | Multi-Channel Audio CODEC | |
| Fabricantes | AVS | |
| Logotipo |  |
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AVS Technology
AV2188
Multi-Channel Audio CODEC
FEATURES
• Six Channel 24/20-bit DACs.
- 102 dB SNR
- 104 dB Dynamic Range.
- -90 dB THD + N Ratio.
- 32, 44.1 48 and 96 KHz. Sampling rates.
- 20-bit and 24-bit Digital Inputs.
- Containing Digital De-emphasis Filters.
- Digital Volume Control.
- I2S, Left and Right Justified Digital Input
Formats.
- Auto-Mute Control.
- On -chip Reconstruction Filters.
• Two Channel Stereo ADCs
- 32, 44.1 and 48 KHz. Sampling Rate.
- 100 dB SNR and Dynamic Range.
- -96 dB THD + N Ratio.
- I2S and Left Justified Output Formats.
• System clock: 384 fs for 32, 44.1 or 48 KH.
Sampling Rates, 194 fs for 96 KHz. Sam-
pling Rate.
General
• Automatic input format detection.
• 5-volt Power Supply.
• 3.3 -volt Digital Interface Frindly.
• I2C Interface for Mode Setting.
Applications
• Digital Surround Sound For Home Theater
• DVD
• Car Audio.
Ordering Information
• 28 pin SOJ package
SDA
SCL
SD1
SD2
SD3
SDOUT
SF
SC
80
80
77
80
77
78
I2C Serial
Control Port
AV2188
Format
Detect'n
High Pass
Filter
PLL
Decimation
Filter
15
AVS Technology Inc.
4110 Clipper Ct., Fremont CA94538
Tel: (510) 353-0848
Fax: (510) 353-0856
XCK
1-20
RST
D/A 40KHz
D/A 40KHz
D/A 40KHz
D/A 40KHz
D/A 40KHz
D/A 40KHz
A/D
A/D
VOR3
VOL3
VOR2
VOL2
VOR1
VOL1
BIN
AIN
June 2, 2000
1 page  
AV2188
PIN DESCRIPTION (Continued)
Pin Name
DVSS
XCK
SCL
SDA
TEST
RST
Analog
VOL3
VOR3
VOL2
VOR2
VOL1
VOR1
AVSS
VCM2
AVDD
VCM1
AVSS
AINR
AINL
N/C
Pin #
9
10
11
12
11
12
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Type
Description
GND Digital ground
I External Master Clock Input.
I I2C clock input.
I/O I2C DATA bus. Open drain ouput. Externally this pin should tie to a 680 ohm pull
up resistor.
O Test fs reference pin. For test vector verification. For normal operation this pin
must be tied to ‘0’.
I Active low power down reset. When low, the chip is reset and all programmable
registers are reset to default values. Must activate this pin if the P/S or
ADDR[1:0] change state.
O Analog left channel output 3
O Analog right channel output 3.
O Analog left channel output 2.
O Analog right channel output 2.
O Analog left channel output 1.
O Analog right channel output 1.
GND Analog circuits ground
Common voltage output pin for the DAC.
+5V Analog circuits power supply
Common voltage output pin for the ADC.
GND Analog circuits ground
I ADC right cahnnel input. 1 volt rms input.
I ADC left channel input. 1 volt rms input.
No connection, should be tied to AVSS
5-20
June 2, 2000
5 Page 
CONTROL REGISTERS DESCRIPTION
AV2188
Control Register 0(ADDR=hex00, default=hex80)
ADDR[4:0]
Hex 00
Default Value
R/W
BIT 7
LT
0
R/W
BIT 6
IIS
CREG0[7:0]
BIT 5
BIT 4
FMT[1:0]
BIT 3
AMUTE
0
R/W
BIT 2
0
R/W
[LT, IIS] Digital Serial Bus Format Select
00: - Normal or Right Justified Format. (default)
01: - I2S Format.
10: - Left Justified Format.
10: - Not allowed.
FMT[1:0]: - These two bits define the seial audio input resolution
00: - 24-bit resolution . (default)
01: - 20-bit resolution.
10: - 18-bit resolution.
11: - 16-bit resolution.
AMUTE: - Active low automute detection enable.
0: - Automute enabled. (default)
1: - No automute.
DEML: - De-emphasis Control
00: - No De-emphasis. (default)
01: - Select 44.1K de-emphasis filter.
10:- Select 48 K de-emphasis filter.
BIT 1
BIT 0
DEM[1:0]
00
R/W R/W
Control Register 1 (ADRS=hex01, default=hex80)
ADDR[4:0]
Hex 01
Default Value
R/W
BIT 7
BIT 6
ADCPWD
10
R/W
BIT 5
fs384
0
R/W
CREG1[7:0]
BIT 4
px4s
0
R/W
BIT 3
px2s
BIT 2
BIT 1
BIT 0
DACPWD12
0
R/W
DACPWD34
0
R/W
DACPWd56
0
R/W
ADCPWD: ADC Control.
0 - ADC operational.
1 - Power down the ADC.
11-20
June 2, 2000
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet AV2188.PDF ] | |
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