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기능 CMOS single-chip 8-bit microcontroller
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S87C654-8A44 데이터시트, 핀배열, 회로
INTEGRATED CIRCUITS
87C654
CMOS single-chip 8-bit microcontroller
Product specification
IC20 Data Handbook
1996 Aug 16
Philips
Semiconductors




S87C654-8A44 pdf, 반도체, 판매, 대치품
Philips Semiconductors
CMOS single-chip 8-bit microcontroller
Product specification
87C654
ORDERING INFORMATION
PHILIPS PART
ORDER NUMBER
PART MARKING
ROMless
ROM
PHILIPS NORTH AMERICA
PART ORDER NUMBER
ROMless
ROM
P80C652FBP P83C654FBP/xxx S80C652FBPN S83C654FBPN
Drawing
Number
SOT129-1
P80C652FBA P83C654FBA/xxx S80C652FBAA S83C654FBAA SOT187-2
TEMPERATURE
RANGE °C
AND PACKAGE
0 to +70, Plastic Dual In-line Package
0 to +70, Ceramic Dual In-line Package
w/Window
0 to +70, Plastic Leaded Chip Carrier
FREQ
MHz
16
16
16
P80C652FBB P83C654FBB/xxx S80C652FBBB S83C654FBBB SOT307-24
P80C652FFP P83C654FFP/xxx S80C652FFPN S83C654FFPN SOT129-1
0 to +70, Plastic Quad Flat Pack
–40 to +85, Plastic Dual In-line Package
16
16
P80C652FFA P83C654FFA/xxx
P80C652FFB P83C654FFB/xxx
P80C652FHP P83C654FHP/xxx
P80C652FHA P83C654FHA/xxx
P80C652FHB P83C654FHB/xxx
S80C652FFAA
S80C652FFBB
S80C652FHPN
S80C652FHAA
S80C652FHBB
S83C654FFAA
S83C654FFBB
S83C654FHPN
S83C654FHAA
S83C654FHBB
SOT187-2
SOT307-24
SOT129-1
SOT187-2
SOT307-24
–40 to +85, Plastic Leaded Chip Carrier
–40 to +85, Plastic Quad Flat Pack
–40 to +125, Plastic Dual In-line Package
–40 to +125, Plastic Leaded Chip Carrier
–40 to +125, Plastic Quad Flat Pack
16
16
16
16
16
P80C652IBP P83C654IBP/xxx S80C652IBPN S83C654IBPN
P80C652IBA P83C654IBA/xxx S80C652IBAA S83C654IBAA
P80C652IBB P83C654IBB/xxx S80C652IBBB S83C654IBBB
P80C652IFP P83C654IFP/xxx S80C652IFPN S83C654IFPN
P80C652IFA P83C654IFA/xxx S80C652IFAA S83C654IFAA
P80C652IFB P83C654IFB/xxx S80C652IFBB S83C654IFBB
NOTES:
1. For full specification, see the 87C652 data sheet.
2. 87C654 frequency range is 3.5MHz – 16MHz or 3.5MHz – 24MHz.
3. xxx denotes the ROM code number.
4. SOT311 replaced by SOT307-2.
SOT129-1
SOT187-2
SOT307-24
SOT129-1
SOT187-2
SOT307-24
0 to +70, Plastic Dual In-line Package
0 to +70, Plastic Leaded Chip Carrier
0 to +70, Plastic Quad Flat Pack
–40 to +85, Plastic Dual In-line Package
–40 to +85, Plastic Leaded Chip Carrier
–40 to +85, Plastic Quad Flat Pack
24
24
24
24
24
24
1996 Aug 16
4

4페이지










S87C654-8A44 전자부품, 판매, 대치품
Philips Semiconductors
CMOS single-chip 8-bit microcontroller
Product specification
87C654
PIN DESCRIPTIONS
PIN NUMBER
MNEMONIC DIP LCC QFP TYPE NAME AND FUNCTION
VSS
20 22 16
I Ground: 0V reference.
VCC
40 44 38
I Power Supply: This is the power supply voltage for normal, idle, and power-down
operation.
P0.0–0.7
39–32 43–36 37–30
I/O Port 0: Port 0 is an open-drain, bidirectional I/O port. Port 0 pins that have 1s written to them
float and can be used as high-impedance inputs. Port 0 is also the multiplexed low-order
address and data bus during accesses to external program and data memory. In this
application, it uses strong internal pull-ups when emitting 1s. Port 0 also outputs the code
bytes during program verification in the 87C654. External pull-ups are required during
program verification.
P1.0–P1.7
P1.6
P1.7
1–8 2–9 40–44, I/O Port 1: Port 1 is an 8-bit bidirectional I/O port with internal pull-ups, except P1.6 and P1.7
1–3 which are open drain. Port 1 pins that have 1s written to them are pulled high by the internal
pull-ups and can be used as inputs. As inputs, port 1 pins that are externally pulled low will
source current because of the internal pull-ups. (See DC Electrical Characteristics: IIL).
Port 1 also receives the low-order address byte during program memory verification.
Alternate functions include:
78
2 I/O
SCL: I2C-bus serial port clock line.
89
3 I/O
SDA: I2C-bus serial port data line.
P2.0–P2.7 21–28 24–31 18–25 I/O Port 2: Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. Port 2 pins that have 1s
written to them are pulled high by the internal pull-ups and can be used as inputs. As inputs,
port 2 pins that are externally being pulled low will source current because of the internal
pull-ups. (See DC Electrical Characteristics: IIL). Port 2 emits the high-order address byte
during fetches from external program memory and during accesses to external data memory
that use 16-bit addresses (MOVX @DPTR). In this application, it uses strong internal
pull-ups when emitting 1s. During accesses to external data memory that use 8-bit
addresses (MOV @Ri), port 2 emits the contents of the P2 special function register.
P3.0–P3.7 10–17 11,
5,
13–19 7–13
10 11
5
11 13
7
12 14
8
13 15
9
14 16 10
15 17
11
16 18 12
17 19 13
I/O Port 3: Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. Port 3 pins that have 1s
written to them are pulled high by the internal pull-ups and can be used as inputs. As inputs,
port 3 pins that are externally being pulled low will source current because of the pull-ups.
(See DC Electrical Characteristics: IIL). Port 3 also serves the special features of the 80C51
family, as listed below:
I RxD (P3.0): Serial input port
O TxD (P3.1): Serial output port
I INT0 (P3.2): External interrupt
I INT1 (P3.3): External interrupt
I T0 (P3.4): Timer 0 external input
I T1 (P3.5): Timer 1 external input
O WR (P3.6): External data memory write strobe
O RD (P3.7): External data memory read strobe
RST
9 10
4
I Reset: A high on this pin for two machine cycles while the oscillator is running, resets the
device. An internal diffused resistor to VSS permits a power-on reset using only an external
capacitor to VCC.
ALE/PROG 30 33 27 I/O Address Latch Enable/Program Pulse: Output pulse for latching the low byte of the
address during an access to external memory. In normal operation, ALE is emitted at a
constant rate of 1/6 the oscillator frequency, and can be used for external timing or clocking.
Note that one ALE pulse is skipped during each access to external data memory. This pin is
also the program pulse input (PROG) during EPROM programming.
PSEN
29 32 26
O Program Store Enable: The read strobe to external program memory. When the 87C654 is
executing code from the external program memory, PSEN is activated twice each machine
cycle, except that two PSEN activations are skipped during each access to external data
memory. PSEN is not activated during fetches from internal program memory.
EA/VPP
XTAL1
31 35 29
19 21 15
I External Access Enable/Programming Supply Voltage: EA must be externally held low to
enable the device to fetch code from external program memory locations 0000H and 3FFFH.
If EA is held high, the device executes from internal program memory unless the program
counter contains an address greater than 3FFFH. This pin also receives the 12.75V
programming supply voltage (VPP) during EPROM programming.
I Crystal 1: Input to the inverting oscillator amplifier and input to the internal clock generator
circuits.
XTAL2
18 20 14
O Crystal 2: Output from the inverting oscillator amplifier.
NOTE:
To avoid “latch-up” effect at power-on, the voltage on any pin at any time must not be higher than VCC + 0.5V or VSS – 0.5V, respectively.
1996 Aug 16
7

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S87C654-8A44

CMOS single-chip 8-bit microcontroller

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