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S9418 데이터시트 PDF




ETC에서 제조한 전자 부품 S9418은 전자 산업 및 응용 분야에서
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부품번호 S9418 기능
기능 Quad 8-Bit Nonvolatile DACPOT Electronic Potentiometer With a Mute Control Input
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S9418 데이터시트, 핀배열, 회로
SUMMIT
MICROELECTRONICS, Inc.
Quad 8-Bit Nonvolatile DACPOT™ Electronic Potentiometer
With a Mute Control Input
S9418
FEATURES
• Four 8-Bit DACS
— Differential Non-linearity - ±0.5LSB max
— Integral Non-Linearity Error - ±1LSB max
• Each DAC has Independent Reference Inputs
— Output Buffer Amplifiers Swing Rail-to-Rail
— Ground to VDD Reference Input Range
• Each DAC’s Digital Inputs Maintained in
EEPROM
• Power-On Reset Reloads Registers with
Nonvolatile Data
• Simple Serial Interface for Reading and Writing
DAC values, SPI™ and QSPI™ compatible.
• Fully operational from 2.7V to 5.5V
• Low Power, 4mW max at +5V
OVERVIEW
The S9418 DACPOT™ is a serial input, voltage output,
quad 8-bit digital to analog converter. The S9418 oper-
ates from a single +2.7V to +5.5V supply. Internal preci-
sion buffers swing rail-to-rail and the reference input
range includes both ground and the positive supply.
The S9418 integrates four 8-bit DACs and their associ-
ated circuits which include; an enhanced unity gain opera-
tional amplifier output, an 8-bit data latch, an 8-bit non-
volatile register and an industry standard serial interface
for reading and writing data to the DACs’ data latches and
registers. The DACs are independently programmable
and each has its own electrically isolated Vreference
inputs.
FUNCTIONAL BLOCK DIAGRAM
RDY/BSY
Programming
Memory
Controller
Memory Control
8-bit E2PROM
Serial Data In 8-bit Data Register
CS
DI
CLK
MUTE
VDD
GND
Control
Logic
Serial Data Out
8-bit DAC
AMP
DAC Section 0
VREFH0
VOUT0
VREFL0
DAC Section 1
DAC Section 2
DAC Section 3
VREFH1
VOUT1
VREFL1
VREFH2
VOUT2
VREFL2
VREFH3
VOUT3
VREFL3
DO
2023 ILL2 1.2
SUMMIT MICROELECTRONICS, Inc. • 300 Orchard City Drive, Suite 131 • Campbell, CA 95008 • Telephone 408-378-6461 • Fax 408-378-6586 • www.summitmicro.com
© SUMMIT MICROELECTRONICS, Inc. 1999
2023 1.5 4/24/99
Characteristics subject to change without notice
1




S9418 pdf, 반도체, 판매, 대치품
S9418
CS
CLK
DI
DO
RDY/BSY
VOUT
S
T
C1 C0 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
A
R
T
Hi Z
Pulled Up to VDD
FIGURE 2. WRITE SEQUENCE
2023 ILL5 1.0
Rising Edge Sets
NV Write Enable Latch
CS
CLK
Rising Edge Starts
NV Write
DI
RDY/BSY
S
T
C1 C0 A1
D0
A
R Address and Data
T are Don’t Care
Pulled Up to VDD
S
T
C1 C0 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
A
R
T
FIGURE 3. NONVOLATILE WRITE SEQUENCE
NV Write Enable
Latch is Reset
2023 ILL4 1.0
NONVOLATILE WRITE
A nonvolatile write is a two step operation: it is initiated by
taking CS LOW and clocking in a start bit followed by the
NV Write Enable command. At this point the host can take
CS back high or continue clocking in data. This data is
don’t care and will be ignored by the S9418.
Next, the host takes CS LOW again and issues a write
command and address and then clocks in the eight data
bits to be programmed. The host will then bring CS HIGH
and the data will be latched into the data register and a
nonvolatile write operation will commence.
The status of the nonvolatile write can be monitored on the
RDY/BSY pin. A logic low indicates the write is still in
progress and the S9418 will not be accessible to the host;
a logic high indicates the write has completed and the
S9418 is ready for the next command. Refer to Figure 3
for an illustration of the sequence of bus conditions for a
nonvolatile write operation.
2023 1.5 4/24/99
4

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S9418 전자부품, 판매, 대치품
S9418
AC ELECTRICAL CHARACTERISTICS
VDD = +4.5V to +5.5V, VREFH = VDD, VREFL = 0V, TA = -40°C to +85°C, unless otherwise specified
Symbol
Parameter
Conditions
Min. Typ. Max.
fC
tWH
tWL
tCS
tCSS
tCSH
tSU
tH
tV
tHO
tDIS
tBUSY
Clock Frequency
Minimum CLK High Time
Minimum CLK Low Time
Minimum CS High Time
CS Setup Time
CS Hold Time
Data In Setup Time
Data In Hold Time
Output Valid Time
Data Out Hold Time
Output Disable Time
Write Cycle Time
CL = 100pF
See Note 1
DC 1
500
300
150
100
0
50
50
150
0
400
3.3 5
Notes:
1. All timing measurements are defined at the point of signal crossing VDD/2.
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
2023 PGM T5 1.1
CS
CLK
DI
tSU
Hi Z
DO
RDY/BSY
tCSS
tH
tWL
tV
tCS
tWH
tCSH
tHO tDIS
Hi Z
FIGURE 5. AC TIMING DIAGRAM
2023 ILL7 1.0
2023 1.5 4/24/99
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부품번호상세설명 및 기능제조사
S9418

Quad 8-Bit Nonvolatile DACPOT Electronic Potentiometer With a Mute Control Input

ETC
ETC

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