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부품번호 | SFR9230B 기능 |
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기능 | 200V P-Channel MOSFET | ||
제조업체 | Fairchild Semiconductor | ||
로고 | |||
전체 9 페이지수
SFR9230B / SFU9230B
200V P-Channel MOSFET
General Description
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switching DC/DC converters.
Features
• -5.4A, -200V, RDS(on) = 0.8Ω @VGS = -10 V
• Low gate charge ( typical 33 nC)
• Low Crss ( typical 45 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
S
D!
GS
D-PAK
SFR Series
GDS
I-PAK
SFU Series
G!
●
●
▶▲
●
!
D
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Parameter
Drain-Source Voltage
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
Drain Current - Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
Power Dissipation (TA = 25°C) *
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
SFR9230B / SFU9230B
-200
-5.4
-3.4
-22
± 30
390
-5.4
4.9
-5.5
2.5
49
0.39
-55 to +150
300
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W
W/°C
°C
°C
Thermal Characteristics
Symbol
Parameter
RθJC
Thermal Resistance, Junction-to-Case
RθJA
Thermal Resistance, Junction-to-Ambient *
RθJA
Thermal Resistance, Junction-to-Ambient
* When mounted on the minimum pad size recommended (PCB Mount)
Typ Max Units
-- 2.55 °C/W
-- 50 °C/W
-- 110 °C/W
©2002 Fairchild Semiconductor Corporation
Rev. B, December 2002
Typical Characteristics (Continued)
1.2
1.1
1.0
0.9 ※Notes:
1. V =0V
2.
I
GS
=
-250
μ
A
D
0.8
-100
-50 0 50 100 150
T, Junction Temperature [oC]
J
200
Figure 7. Breakdown Voltage Variation
vs. Temperature
101
100
10-1
100
Operation in This Area
is Limited by R
DS(on)
100 µs
1 ms
10 ms
DC
※ Notes :
1. T = 25 oC
C
2. T = 150 oC
J
3. Single Pulse
101 102
-VDS, Drain-Source Voltage [V]
Figure 9. Maximum Safe Operating Area
2.5
2.0
1.5
1.0
0.5
0.0
-100
※ Notes :
1. VGS = -10 V
2. ID = -3.3 A
-50 0 50 100 150
TJ, Junction Temperature [oC]
200
Figure 8. On-Resistance Variation
vs. Temperature
6
5
4
3
2
1
0
25 50 75 100 125 150
TC, Case Temperature [℃]
Figure 10. Maximum Drain Current
vs. Case Temperature
100
1 0 -1
D = 0.5
0 .2
0 .1
0 .05
0 .02
0 .01
sin g le p u ls e
※ N otes :
1 . Z θ JC(t) = 2 .5 5 ℃ /W M a x .
2. D uty F a ctor, D = t1/t2
3 . T JM - T C = P D M * Z θ JC(t)
PDM
t1
t2
1 0 -2
1 0 -5
1 0 -4
1 0 -3
1 0 -2
1 0 -1
100
t1, S q u a re W a v e P u ls e D u ra tio n [s e c ]
101
Figure 11. Transient Thermal Response Curve
©2002 Fairchild Semiconductor Corporation
Rev. B, December 2002
4페이지 Package Dimensions
(0.50)
6.60 ±0.20
5.34 ±0.30
(4.34)
D-PAK
(0.50)
2.30 ±0.10
0.50 ±0.10
MAX0.96
2.30TYP
[2.30±0.20]
0.76 ±0.10
2.30TYP
[2.30±0.20]
6.60 ±0.20
(5.34)
(5.04)
(1.50)
0.50 ±0.10
1.02 ±0.20
2.30 ±0.20
(2XR0.25)
©2002 Fairchild Semiconductor Corporation
0.76 ±0.10
Dimensions in Millimeters
Rev. B, December 2002
7페이지 | |||
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부품번호 | 상세설명 및 기능 | 제조사 |
SFR9230B | 200V P-Channel MOSFET | Fairchild Semiconductor |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |