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UC3842 데이터시트 PDF




Fairchild에서 제조한 전자 부품 UC3842은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

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부품번호 UC3842 기능
기능 SMPS Controller
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UC3842 데이터시트, 핀배열, 회로
www.fairchildsemi.com
UC3842/UC3843/UC3844/UC3845
SMPS Controller
Features
• Low Start up Current
• Maximum Duty Clamp
• UVLO With Hysteresis
• Operating Frequency up to 500KHz
Internal Block Diagram
Description
The UC3842/UC3843/UC3844/UC3845 are fixed
frequencycurrent-mode PWM controller. They are specially
designed for Off-Line and DC to DC converter applications
with minimum external components. These integrated
circuits feature a trimmed oscillator for precise duty cycle
control, a temperature compensated reference, high gain
error amplifier, current sensing comparator and a high
current totempole output for driving a Power MOSFET. The
UC3842 and UC3844 have UVLO thresholds of 16V (on)
and 10V (off). The UC3843 and UC3845 are 8.5V(on) and
7.9V (off). The UC3842 and UC3843 can operate within
100% duty cycle. The UC3844 and UC3845 can operate
with 50% duty cycle.
8-DIP
8-SOP
1
14-SOP
1
1
* NORMALLY 8DIP/8SOP PIN NO.
* ( ) IS 14SOP PINNO.
* TOGGLE FLIP FLOP USED ONLY IN UC3844, UC3845
©2002 Fairchild Semiconductor Corporation
Rev. 1.0.1




UC3842 pdf, 반도체, 판매, 대치품
UC3842/UC3843/UC3844/UC3845
Electrical Characteristics (Continued)
(VCC=15V, RT=10k, CT=3.3nF, TA= 0°C to +70°C, unless otherwise specified)
Parameter
PWM SECTION
Max. Duty Cycle
Min. Duty Cycle
TOTAL STANDBY CURRENT
Start-Up Current
Operating Supply Current
Zener Voltage
Symbol
Conditions
D(Max)
D(Max)
D(MIN)
UC3842/UC3843
UC3844/UC3845
-
IST
ICC(OPR)
VZ
-
Vpin3=Vpin2=ON
ICC = 25mA
Min. Typ. Max. Unit
95 97 100 %
47 48 50 %
- - 0%
- 0.45 1 mA
- 14 17 mA
30 38 - V
Adjust VCC above the start threshould before setting at 15V
Note:
1. Parameter measured at trip point of latch
2. Gain defined as:
A = -----V----p---i-n---1-
Vpin3
,0 Vpin3 0.8V
3. These parameters, although guaranteed, are not 100 tested in production.
UC3842
Figure 1. Open Loop Test Circuit
High peak currents associated with capacitive loads necessitate careful grounding techniques Timing and bypass capacitors
should be connected close to pin 5 in a single point ground. The transistor and 5kpotentiometer are used to sample the
oscillator waveform and apply an adjustable ramp to pin 3.
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UC3842 전자부품, 판매, 대치품
UC3842/UC3843/UC3844/UC3845
Shutdown of the UC3842 can be accomplished by two methods; either raise pin 3 above 1V or pull pin 1 below a voltage two
diode drops above ground. Either method causes the output of the PWM comparator to be high (refer to block diagram). The
PWM latch is reset dominant so that the output will remain low until the next clock cycle after the shutdown condition at pins
1 and/or 3 is removed. In one example, an externally latched shutdown may be accomplished by adding an SCR which will be
reset by cycling VCC below the lower UVLO threshold. At this point the reference turns off, allowing the SCR to reset.
UC3842/UC3843
Figure 9. Slope Compensation
A fraction of the oscillator ramp can be resistively summed with the current sense signal to provide slope compensation for
converters requiring duty cycles over 50%. Note that capacitor, CT, forms a filter with R2 to suppress the leading edge switch
spikes.
Temperature (°C)
Figure 10. Temperature Drift (Vref)
Temperature (°C)
Figure 11. Temperature Drift (Ist)
Temperature (°C)
Figure 12. Temperature Drift (Icc)
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