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29F800 데이터시트 PDF




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부품번호 29F800 기능
기능 8M-BIT [1Mx8/512Kx16] CMOS FLASH MEMORY
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29F800 데이터시트, 핀배열, 회로
PRELIMINARY
MX29F800T/B
8M-BIT [1Mx8/512Kx16] CMOS FLASH MEMORY
FEATURES
• 1,048,576 x 8/524,288 x 16 switchable
• Single power supply operation
- 5.0V only operation for read, erase and program
operation
• Fast access time: 70/90/120ns
• Low power consumption
- 50mA maximum active current
- 0.2uA typical standby current
• Command register architecture
- Byte/word Programming (7us/12us typical)
- Sector Erase (Sector structure 16K-Bytex1,
8K-Bytex2, 32K-Bytex1, and 64K-Byte x15)
• Auto Erase (chip & sector) and Auto Program
- Automatically erase any combination of sectors with
Erase Suspend capability.
- Automatically program and verify data at specified
address
• Erase suspend/Erase Resume
- Suspends sector erase operation to read data from,
or program data to, another sector that is not being
erased, then resumes the erase.
• Status Reply
- Data polling & Toggle bit for detection of program and
erase operation completion.
• Ready/Busy pin (RY/BY)
- Provides a hardware method of detecting program
or erase operation completion.
• Sector protection
- Sector protect/chip unprotect for 5V/12V system.
- Hardware method to disable any combination of
sectors from program or erase operations
- Tempory sector unprotect allows code changes in
previously locked sectors.
• 100,000 minimum erase/program cycles
• Latch-up protected to 100mA from -1V to VCC+1V
• Boot Code Sector Architecture
- T = Top Boot Sector
- B = Bottom Boot Sector
• Low VCC write inhibit is equal to or less than 3.2V
• Package type:
- 44-pin SOP
- 48-pin TSOP
• Compatibility with JEDEC standard
- Pinout and software compatible with single-power
supply Flash
GENERAL DESCRIPTION
The MX29F800T/B is a 8-mega bit Flash memory or-
ganized as 1M bytes of 8 bits or 512K words of 16 bits.
MXIC's Flash memories offer the most cost-effective and
reliable read/write non-volatile random access memory.
The MX29F800T/B is packaged in 44-pin SOP, 48-pin
TSOP. It is designed to be reprogrammed and erased
in system or in standard EPROM programmers.
The standard MX29F800T/B offers access time as fast
as 70ns, allowing operation of high-speed microproces-
sors without wait states. To eliminate bus contention,
the MX29F800T/B has separate chip enable (CE) and
output enable (OE) controls.
MXIC's Flash memories augment EPROM functionality
with in-circuit electrical erasure and programming. The
MX29F800T/B uses a command register to manage this
functionality. The command register allows for 100%
TTL level control inputs and fixed power supply levels
during erase and programming, while maintaining maxi-
mum EPROM compatibility.
MXIC Flash technology reliably stores memory contents
even after 100,000 erase and program cycles. The MXIC
cell is designed to optimize the erase and programming
mechanisms. In addition, the combination of advanced
tunnel oxide processing and low internal electric fields
for erase and program operations produces reliable cy-
cling. The MX29F800T/B uses a 5.0V±10% VCC sup-
ply to perform the High Reliability Erase and auto Pro-
gram/Erase algorithms.
The highest degree of latch-up protection is achieved
with MXIC's proprietary non-epi process. Latch-up pro-
tection is proved for stresses up to 100 milliamps on
address and data pin from -1V to VCC + 1V.
P/N:PM0578
REV. 1.7, JUL. 24, 2001
1




29F800 pdf, 반도체, 판매, 대치품
BLOCK DIAGRAM
MX29F800T/B
CONTROL
PROGRAM/ERASE
CE INPUT
OE
WE LOGIC
HIGH VOLTAGE
WRITE
STATE
MACHINE
(WSM)
A0-A18
ADDRESS
LATCH
AND
BUFFER
MX29F800T/B
FLASH
ARRAY
ARRAY
SOURCE
HV
Y-PASS GATE
STATE
REGISTER
COMMAND
DATA
DECODER
SENSE
AMPLIFIER
PGM
DATA
HV
PROGRAM
DATA LATCH
COMMAND
DATA LATCH
Q0-Q15/A-1
I/O BUFFER
P/N:PM0578
REV. 1.7, JUL. 24, 2001
4

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29F800 전자부품, 판매, 대치품
MX29F800T/B
COMMAND DEFINITIONS
Device operations are selected by writing specific ad-
dress and data sequences into the command register.
Writing incorrect address and data values or writing them
in the improper sequence will reset the device to the
read mode. Table 1 defines the valid register command
sequences. Note that the Erase Suspend (B0H) and
Erase Resume (30H) commands are valid only while
the Sector Erase operation is in progress. Either of the
two reset command sequences will reset the
device(when applicable).
TABLE 2. MX29F800T/B BUS OPERATION
Pins
Mode
Read Silicon ID
Manfacturer Code(1)
Read Silicon ID
Device Code(1)
Read
Standby
Output Disable
Write
Sector Protect(6)
Chip Unprotect
Verify Sector Protect(6)
Reset
CE OE WE A0 A1 A6 A9
Q0 ~ Q15
L L H L L X VID(2) C2H (Byte mode)
00C2H (Word mode)
L L H H L X VID(2) D6H/58H (Byte mode)
22D6H/2258H (Word mode)
L L H A0 A1 A6 A9 D
OUT
H XXXXXX
HIGH Z
L HHXXXX
HIGH Z
L H L A0 A1 A6 A9 D (3)
IN
L VID(2) L X X L VID(2) X
L VID(2) L X X H VID(2) X
L L H X H X V (2) Code(5)
ID
X XXXXXX
HIGH Z
NOTES:
1. Manufacturer and device codes may also be accessed via a command register write sequence. Refer to Table 1.
2. VID is the Silicon-ID-Read high voltage, 11.5V to 12.5V.
3. Refer to Table 1 for valid Data-In during a write operation.
4. X can be VIL or VIH.
5. Code=00H/0000H means unprotected.
Code=01H/0001H means protected.
6. A18~A12=Sector address for sector protect.
P/N:PM0578
REV. 1.7, JUL. 24, 2001
7

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