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74FR245 데이터시트 PDF




Fairchild에서 제조한 전자 부품 74FR245은 전자 산업 및 응용 분야에서
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부품번호 74FR245 기능
기능 Octal Bidirectional Transceiver with 3-STATE Outputs
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74FR245 데이터시트, 핀배열, 회로
August 1990
Revised August 1999
74FR245
Octal Bidirectional Transceiver with 3-STATE Outputs
General Description
The 74FR245 contains eight non-inverting bidirectional
buffers with 3-STATE outputs and is intended for bus-ori-
ented applications. Current sinking capability is 64 mA on
both the A and B Ports. The Transmit/Receive (T/R) input
determines the direction of data flow through the bidirec-
tional transceiver. Transmit (active-HIGH) enables data
from A Ports to B Ports; Receive (active-LOW) enables
data from B Ports to A Ports. The Output Enable input,
when HIGH, disables both A and B Ports by placing them
in a High Z condition.
Features
s Non-inverting buffers
s Bidirectional data path
s A and B output sink capability of 64 mA, source
capability of 15 mA
s Guaranteed pin-to-pin skew
Ordering Code:
Order Number Package Number
Package Description
74FR245SC
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74FR245SJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74FR245PC
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
Pin Descriptions
Pin Names
OE
T/R
A0–A7
B0–B7
Description
Output Enable Input (Active-LOW)
Transmit/Receive Input
Side A Inputs or 3-STATE Outputs
Side B Inputs or 3-STATE Outputs
Truth Table
Inputs
OE T/R
LL
LH
HX
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Output
Bus B Data to Bus A
Bus A Data to Bus B
High Z State
© 1999 Fairchild Semiconductor Corporation DS010887
www.fairchildsemi.com




74FR245 pdf, 반도체, 판매, 대치품
AC Electrical Characteristics
Symbol
Parameter
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
Propagation Delay
An to Bn or Bn to An
Output Enable Time
Output Disable Time
Extended AC Characteristics
TA = +25°C
VCC = +5.0V
CL = 50 pF
Min Typ Max
1.0 2.6 3.9
1.0 1.7 3.9
2.5 5.0 7.0
2.5 4.3 7.0
1.7 3.7 6.5
1.7 3.6 6.5
TA = 0°C to +70°C
VCC = +5.0V
CL = 50 pF
Min Max
1.0 3.9
1.0 3.9
2.5 7.0
2.5 7.0
1.7 6.5
1.7 6.5
Units
ns
ns
ns
Symbol
Parameter
TA = 0°C to +70°C
TA = 0°C to +70°C
Units
VCC = +5.0V
VCC = +5.0V
CL = 50 pF
CL = 250 pF
Eight Outputs Switching
(Note 4)
(Note 3)
Min Max Min Max
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tOSHL
(Note 5)
Propagation Delay
An to Bn or Bn to An
Output Enable Time
Output Disable Time
Pin to Pin Skew
for HL Transitions
1.0 5.9 2.5 7.5
ns
1.0 5.9 2.5 7.5
2.5 11.9
2.5 11.9
ns
1.3 6.5
1.3 6.5
ns
1.7 ns
tOSLH
(Note 5)
Pin to Pin Skew
for LH Transitions
1.0 ns
tOST
(Note 5)
Pin to Pin Skew
for HL/LH Transitions
3.3 ns
Note 3: This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase, i.e., all LOW-to-
HIGH, HIGH-to-LOW, 3-STATE-to-HIGH, etc.
Note 4: These specifications guaranteed but not tested. The limits represent propagation delays with 250 pF load capacitors in place of the 50 pF load
capacitors in the standard AC load. This specification pertains to single output switching only.
Note 5: Skew is defined as the absolute value of the difference between the actual propagation delays for any two outputs of the same device. The specifi-
cation applies to any outputs switching HIGH-to-LOW (tOSHL), LOW-to-HIGH (tOSLH), or HIGH-to-LOW and/or LOW-to-HIGH (tOST). Specifications guaran-
teed with all outputs switching in phase.
www.fairchildsemi.com
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