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Número de pieza | P4C149 | |
Descripción | Ultra High Speed 4K x 1 Static CMOS RAMS | |
Fabricantes | Performance Semiconductor | |
Logotipo | ||
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No Preview Available ! P4C148, P4C149
ULTRA HIGH SPEED 1K x 4
STATIC CMOS RAMS
P4C148/P4C149
FEATURES
Full CMOS, 6T Cell
High Speed (Equal Access and Cycle Times)
– 10/12/15/20/25 ns (Commercial)
– 15/20/25/35 ns (P4C148 Military)
Low Power Operation
– 715 mW Active –10 (Commecial)
– 550 mW Active –25 (Commercial)
– 110 mW Standby (TTL Input) P4C148
– 55 mW Standby (CMOS Input) P4C148
Single 5V ± 10% Power Supply
Two Options
– P4C148 Low Power Standby Mode
– P4C149 Fast Chip Select Control
Common Input/Output Ports
Three-State Outputs
Fully TTL Compatible Inputs and Outputs
Standard Pinout (JEDEC Approved)
– 18 Pin 300 mil DIP
DESCRIPTION
The P4C148 and P4C149 are 4,096-bit ultra high-speed
static RAMs organized as 1K x 4. Both devices have
common input/output ports. The P4C148 enters the standby
mode when the chip enable (CE) goes HIGH; with CMOS
input levels, power consumption is extremely low in this
mode. The P4C149 features a fast chip select capability
using CS. The CMOS memories require no clocks or
refreshing, and have equal access and cycle times. Inputs
are fully TTL-compatible. The RAMs operate from a single
5V ± 10% tolerance power supply.
Access times as fast as 10 nanoseconds are available,
permitting greatly enhanced system operating speeds.
CMOS is used to reduce power consumption when active;
for the P4C148, consumption is further reduced in the
standby mode.
The P4C148 and P4C149 are available in 18-pin 300 mil
DIP packages providing excellent board level densities.
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATIONS
A
A
A
A
A
A
I/O 1
I/O 2
I/O 3
I/O 4
ROW
SELECT
INPUT
DATA
CONTROL
POWER
DOWN
4,096-BIT
MEMORY
ARRAY
COLUMN I/O
COLUMN
SELECT
CE/CS
WE
A AAA
P4C148 ONLY
A0
A1
A2
A3
A4
A5
A6
CE, CS
GND
1
2
3
4
5
6
7
8
9
18 VCC
17 A9
16 A8
15 A7
14 I/O4
13 I/O3
12 I/O2
11 I/O1
10 WE
P4C148 DIP (P1, D1)
P4C149 DIP (P1)
TOP VIEW
Means Quality, Service and Speed
1Q97
19
1 page AC TEST CONDITIONS
Input Pulse Levels
GND to 3.0V
Input Rise and Fall Times
3ns
Input Timing Reference Level
1.5V
Output Timing Reference Level
1.5V
Output Load
See Figures 1 and 2
TRUTH TABLE
Mode
Standby
Read
Write
CE
H
L
L
WE
X
H
L
P4C148/P4C149
Output
High Z
DOUT
High Z
Power
Standby
Active
Active
DOUT
255Ω
+5
480Ω
30pF (5pF* for tHZ, tLZ, tOHZ,
tOLZ, tWZ and tOW)
DOUT
RTH = 166.5Ω
VTH = 1.73 V
30pF (5pF* for tHZ, tLZ, tOHZ,
tOLZ, tWZ and tOW)
Figure 1. Output Load
* including scope and test fixture.
Figure 2. Thevenin Equivalent
Note:
Due to the ultra-high speed of the P4C147, care must be taken when
testing this device; an inadequate setup can cause a normal functioning
part to be rejected as faulty. Long high-inductance leads that cause
supply bounce must be avoided by bringing the VCC and ground planes
directly up to the contactor fingers. A 0.01 µF high frequency capacitor
is also required between VCC and ground. To avoid signal reflections,
proper termination must be used; for example, a 50Ω test environment
should be terminated into a 50Ω load with 1.73V (Thevenin Voltage) at
the comparator input, and a 116Ω resistor must be used in series with
DOUT to match 166Ω (Thevenin Resistance).
23
5 Page |
Páginas | Total 6 Páginas | |
PDF Descargar | [ Datasheet P4C149.PDF ] |
Número de pieza | Descripción | Fabricantes |
P4C147 | Ultra High Speed 4K x 1 Static CMOS RAMS | Performance Semiconductor |
P4C148 | Ultra High Speed 4K x 1 Static CMOS RAMS | Performance Semiconductor |
P4C149 | Ultra High Speed 4K x 1 Static CMOS RAMS | Performance Semiconductor |
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