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DG2019DN 데이터시트 PDF




Vishay Siliconix에서 제조한 전자 부품 DG2019DN은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


PDF 형식의 DG2019DN 자료 제공

부품번호 DG2019DN 기능
기능 Low Voltage / Dual DPDT and Quad SPDT Analog Switches
제조업체 Vishay Siliconix
로고 Vishay Siliconix 로고


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DG2019DN 데이터시트, 핀배열, 회로
New Product
DG2018/2019
Vishay Siliconix
Low Voltage, Dual DPDT and Quad SPDT Analog Switches
FEATURES
D Low Voltage Operation (1.8 V to 5.5 V)
D Low On Resistance
– rDS(on) : 6 W @ 2.7 V
D Low Voltage Logic Compatible
– DG2019: VINH = 1 V
D High Bandwidth: 150 MHz
D QFN-16 Package
BENEFITS
APPLICATIONS
D Ideal for Both Analog and Digital
Signal Switching
D Reduced Power Consumption
D High Accuracy
D Reduced PCB Space
D Fast Switching
D Low Leakage
D Cellular Phones
D Audio and Video Signal Routing
D PCMCIA Cards
D Battery Operated Systems
D Portable Instrumentation
DESCRIPTION
The DG2018 and DG2019 are low voltage, single supply
analog switches. The DG2018 is a dual
double-pole/double-throw (DPDT) with two control inputs that
each controls a pair of single-pole/double-throw (SPDT). The
DG2019 uses one control pin to operate four independent
SPDT switches.
When operated on a +3-V supply, the DG2018’s control pins
are compatible with 1.8-V digital logic. The DG2019 has an
available feature of a VL pin that allows a 1.0-V threshold for the
control pin when VL is powered with 1.5 V.
Built on Vishay Siliconix’s low voltage submicron CMOS
process, the DG2018 and DG2019 are ideal for high
performance switching of analog signals; providing low
on-resistance (6 W @ +2.7 V), fast speed (Ton, Toff @ 42 ns
and 16 ns), and a bandwidth that exceeds 150 MHz.
The DG2018 and DG2019 were designed to offer solutions
that extend beyond audio/video functions, to providing the
performance required for today’s demanding mixed-signal
switching in portable applications.
An epitaxial layer prevents latch-up. Brake-before-make is
guaranteed for all SPDT’s. All switches conduct equally well in
both directions when on, and blocks up to the power supply
level when off.
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG2018DN
QFN-16 (3 X 3)
COM1 NO1 V+ NC4
16 15 14 13
NC1 1
IN1, IN2 2
NO2
3
COM2 4
12 COM4
11 NO4
10 IN3, IN4
9 NC3
5678
NC2 GND NO3 COM3
Top View
Document Number: 72342
S-31644—Rev. A, 01-Aug-03
IN1, IN2
Logic
0
1
IN3, IN4
Logic
0
1
TRUTH TABLE
NC1 and NC2
ON
OFF
NO1 and NO2
OFF
ON
NC3 and NC4
ON
OFF
NO3 and NO4
OFF
ON
ORDERING INFORMATION
Temp Range
-40 to 85°C
Package
QFN-16 (3 x 3 mm)
Part Number
DG2018DN
www.vishay.com
1




DG2019DN pdf, 반도체, 판매, 대치품
DG2018/2019
Vishay Siliconix
New Product
SPECIFICATIONS (V+ = 5 V)
Parameter
Analog Switch
Analog Signal Ranged
On-Resistance
rON Flatness
rON Match Between Channels
Switch Off Leakage Currentf
Channel-On Leakage Currentf
Symbol
Test Conditions
Otherwise Unless Specified
V+ = 5 V, "10%,
(DG2018
(DG2019 Only)
Only) VIN =
VL = 1.5 V,
0.8
VIN
or 1.8 Ve
= 0.4 or 1.0
Ve
Tempa
Limits
40 to 85_C
Minb Typc Maxb
VNO, VNC,
VCOM
rON
rON
Flatness
DrON
INO(off),
INC(off)
ICOM(off)
ICOM(on)
V+ = 4.5 V, VCOM = 3 V, INO, INC = 10 mA
V+ = 4.5 V
VCOM = 0 to V+, INO, INC = 10 mA
V+ = 5.5 V
VNO, VNC = 1 V/4.5 V, VCOM = 4.5 V/1 V
V+ = 5.5 V, VNO, VNC = VCOM = 1 V/4.5 V
Full
Room
Full
Room
Room
Room
Full
Room
Full
Room
Full
0
1
10
1
10
1
10
4
0.6
0.6
0.03
0.03
0.03
V+
8
10
1.2
1.2
1
10
1
10
1
10
Digital Control
Input High Voltage
Input Low Voltage
Input Capacitance
Input Current
VINH
VINL
Cin
IINL or IINH
DG2018 Full 1.8
VL = 1.5 V
DG2019 Full 1.0
DG2018
Full
VL = 1.5 V
DG2019
Full
Full
VIN = 0 or V+
Full 1
9
Dynamic Characteristics
Turn-On Time
Turn-Off Time
tON
tOFF
VNO or VNC = 3 V, RL = 300 W, CL = 35 pF
Room
Full
Room
Full
44
19
Break-Before-Make Time
Charge Injectiond
Off-Isolationd
Crosstalkd
Source-Off Capacitanced
Channel-On Capacitanced
td
VNO or VNC = 3 V, RL = 50 W, CL = 35 pF
Full
1
QINJ
CL = 1 nF, VGEN = 0 V, RGEN = 0 W
Room
2.46
OIRR
XTALK
RL = 50 W, CL = 5 pF, f = 1 MHz
Room
Room
54
53
CNO(off)
Room
7.5
CNC(off)
CNO(on)
VIN = 0 or V+, f = 1 MHz
Room
Room
7.5
30
CNC(on)
Room
30
Power Supply
Power Supply Range
Power Supply Current
V+
I+
VIN = 0 or V+
1.8
Full 0.01
Notes:
a. Room = 25°C, Full = as determined by the operating suffix.
b. Typical values are for design aid only, not guaranteed nor subject to production testing.
c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
d. Guarantee by design, nor subjected to production test.
e. VIN = input voltage to perform proper function.
f. Not production tested.
0.8
0.4
1
48
52
33
35
5.5
1.0
Unit
V
W
nA
V
pF
mA
ns
pC
dB
pF
V
mA
www.vishay.com
4
Document Number: 72342
S-31644—Rev. A, 01-Aug-03

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DG2019DN 전자부품, 판매, 대치품
New Product
DG2018/2019
Vishay Siliconix
TEST CIRCUITS
Switch
Input
Logic
Input
V+
V+
NO or NC
COM
IN
GND
0V
Switch Output
VOUT
RL
300 W
CL
35 pF
Logic
Input
Switch
Output
CL (includes fixture and stray capacitance)
ǒ ǓVOUT + VCOM
RL
RL ) RON
FIGURE 1.
Switching Time
VINH
VINL
50%
tr t 5 ns
tf t 5 ns
0.9 x VOUT
0V
tON
tOFF
Logic “1” = Switch On
Logic input waveforms inverted for switches that have
the opposite logic sense.
V+
V+
VNO
NO
COM
VNC
NC
IN
GND
RL
50 W
VO
CL
35 pF
Logic
Input
VINH
VINL
VNC = VNO
VO
Switch
Output
0V
CL (includes fixture and stray capacitance)
FIGURE 3. Break-Before-Make Interval
90%
tD
tr <5 ns
tf <5 ns
tD
V+
Vgen
Rgen
+
VIN = 0 V+
V+
NC or NO
IN
GND
Document Number: 72342
S-31644—Rev. A, 01-Aug-03
COM
VOUT
CL = 1 nF
VOUT
IN
On
DVOUT
Off
On
Q = DVOUT x CL
FIGURE 2. Charge Injection
IN depends on switch configuration: input polarity
determined by sense of switch.
www.vishay.com
7

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부품번호상세설명 및 기능제조사
DG2019DN

Low Voltage / Dual DPDT and Quad SPDT Analog Switches

Vishay Siliconix
Vishay Siliconix

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