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부품번호 | DG302B 기능 |
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기능 | CMOS Analog Switches | ||
제조업체 | Vishay Siliconix | ||
로고 | |||
전체 9 페이지수
DG300B/301B/302B/303B
Vishay Siliconix
CMOS Analog Switches
FEATURES
D Analog Signal Range: "15 V
D Fast Switching—tON: 150 ns
D Low On-Resistance—rDS(on): 30 W
D Single Supply Operation
D Latch-up Proof
D CMOS Compatible
BENEFITS
APPLICATIONS
D Full Rail-to-Rail Analog Signal Range D Low Level Switching Circuits
D Low Signal Error
D Programmable Gain Amplifiers
D Low Power Dissipation
D Portable and Battery Powered Systems
DESCRIPTION
The DG300B-DG303B family of monolithic CMOS switches
feature three switch configuration options (SPST, SPDT, and
DPST) for precision applications in communications,
instrumentation and process control, where low leakage
switching combined with low power consumption are required.
Designed on the Vishay Siliconix PLUS-40 CMOS process,
these switches are latch-up proof, and are designed to block
up to 30 V peak-to-peak when off. An epitaxial layer prevents
latchup.
In the on condition the switches conduct equally well in both
directions (with no offset voltage) and minimize error
conditions with their low on-resistance.
Featuring low power consumption (3.5 mW typ) these
switches are ideal for battery powered applications, without
sacrificing switching speed. Designed for break-before-make
switching action, these devices are CMOS and quasi TTL
compatible. Single supply operation is allowed by connecting
the V– rail to 0 V.
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
NC 1
D1 2
NC 3
S1 4
NC 5
IN1 6
GND 7
DG300B
Plastic DIP
14 V+
13 D2
12 NC
11 S2
10 NC
9 IN2
8 V–
Top View
TRUTH TABLE
Logic
Switch
0 OFF
1 ON
Logic “0” v 0.8 V
Logic “1” w 4 V
Document Number: 71402
S-02968—Rev. A, 22-Jan-01
www.vishay.com
1
DG300B/301B/302B/303B
Vishay Siliconix
SPECIFICATIONSa
Parameter
Symbol
Test Conditions Unless Specified
V+ = 15 V, V– = –15 V
VIN = 0.8 V or VIN = 4 Vf
Tempb
Limits
–40 to 85_C
Mind Typc Maxd
Unit
Analog Switch
Analog Signal Rangee
Drain-Source On-Resistance
Source Off Leakage Current
Drain Off Leakage Current
Drain On Leakage Current
Digital Control
VANALOG
rDS(on)
IS(off)
ID(off)
ID(on)
VD = "10 V, IS = –10 mA
VS = "14 V, VD = #14 V
VD = VS = "14 V
Full
Room
Full
Room
Hot
Room
Hot
Room
Hot
–15
–5
–100
–5
–100
–5
–100
30
"0.1
"0.1
"0.1
15
50
75
5
100
5
100
5
100
V
W
nA
Input Current with
Input Voltage High
Input Current with
Input Voltage Low
Dynamic Characteristics
IINH
IINL
VIN = 5 V
VIN = 15 V
VIN = 0 V
Room
Full
Room
Full
Room
Full
–1 –0.001
0.001
–1 –0.001
1
mA
Turn-On Time
Turn-Off Time
Break-Before-Make Time
Charge Injection
Source-Off Capacitance
Drain-Off Capacitance
Channel-On Capacitance
Input Capacitance
Off-Isolation
Crosstalk (Channel-to-Channel)
Power Supplies
tON
tOFF
tOPEN
Q
CS(off)
CD(off)
CD(on)
Cin
OIRR
XTALK
See Figure NO TAG
DG301B/303B Only
Figure NO TAG
CL = 1 nF, Rgen = 0 W
Vgen = 0 V, Figure NO TAG
VS, VD = 0 V, f = 1 MHz
f = 1 MHz
VIN = 0 V
VIN = 15 V
VIN = 0 V, RL = 1 kW
VS = 1 Vrms, f = 500 kHz
Room
Room
Room
Room
Room
Room
Room
Room
Room
Room
Room
150
130
50
8
14
14
40
6
7
62
74
ns
pC
pF
dB
Positive Supply Current
Negative Supply Current
Positive Supply Current
Negative Supply Current
I+
I–
I+
I–
VIN = 4 V (One Input)
All Others = 0 V
VIN = 0.8 V (All Inputs)
Room
Full
Room
Full
Room
Full
Room
Full
0.23
–100 –0.001
0.001
–100 –0.001
1
100
mA
mA
Notes:
a. Refer to PROCESS OPTION FLOWCHART.
b. Room = 25_C, Full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
f. VIN = input voltage to perform proper function.
www.vishay.com
4
Document Number: 71402
S-02968—Rev. A, 22-Jan-01
4페이지 TEST CIRCUITS
DG300B/301B/302B/303B
Vishay Siliconix
+15 V
VS = 3 V
5V
V+
SD
IN
GND
V–
RL
300 W
–15 V
CL (includes fixture and stray capacitance)
VO = VS
RL
RL + rDS(on)
VO
CL
33 pF
Logic
Input
0V
VS
Switch
Output
0V
FIGURE 2. Switching Time
Logic “1” = Switch On
50%
90%
tON
10%
tOFF
VS1 = 3 V
VS2 = 3 V
+15 V
V+
S1 D1
VO1
S2 D2 VO2
IN
GND
RL1 CL1
300 W 33 pF
V–
RL2
300 W
CL2
33 pF
–15 V
CL (includes fixture and stray capacitance)
Logic
Input
0V
Logic “1” = Switch On
VINH
50%
VS1
Switch
Output
VO1
0V
50%
VS2
Switch
VO2 50%
Output 0 V
tBBM
FIGURE 3. Break-Before-Make SPDT (DG301B, DG303B)
Rg
Vg
3V
Document Number: 71402
S-02968—Rev. A, 22-Jan-01
+15 V
V+
SD
IN
GND
V–
VO
CL
1 nF
VO
INX
ON
–15 V
FIGURE 4. Charge Injection
DVO
OFF
ON
www.vishay.com
7
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부품번호 | 상세설명 및 기능 | 제조사 |
DG302 | TTL Compatible CMOS Analog Switches | Maxim Integrated |
DG302A | (DG300A - DG303A) CMOS Analog Switches | TEMIC Semiconductors |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |