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PDF SP3481 Data sheet ( Hoja de datos )
| Número de pieza | SP3481 | |
| Descripción | +3.3V Low Power Half-Duplex RS-485 Transceivers with 10Mbps Data Rate | |
| Fabricantes | Sipex | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de SP3481 (archivo pdf) en la parte inferior de esta página. Total 9 Páginas | ||
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® SP3481/SP3485
+3.3V Low Power Half-Duplex RS-485
Transceivers with 10Mbps Data Rate
■ RS-485 and RS-422 Transceivers
■ Operates from a single +3.3V supply
■ Interoperable with +5.0V logic
■ Driver/Receiver Enable
■ Low Power Shutdown Mode (SP3481)
■ -7V to +12V Common-Mode Input
Voltage Range
■ Allows up to 32 transceivers on
the serial bus
■ Compatibility with the industry
standard 75176 pinout
■ Driver Output Short-Circuit Protection
DESCRIPTION
The SP3481 and the SP3485 are a family of +3.3V low power half-duplex transceivers that
meet the specifications of the RS-485 and RS-422 serial protocols. These devices are pin-to-
pin compatible with the Sipex SP481, SP483, and SP485 devices as well as popular industry
standards. The SP3481 and the SP3485 feature Sipex's BiCMOS process, allowing low power
operation without sacrificing performance. The SP3481 and SP3485 meet the electrical
specifications of RS-485 and RS-422 serial protocols up to 10Mbps under load. The SP3481
is equipped with a low power Shutdown mode.
RO 1
RE 2
DE 3
DI 4
R
D
8 Vcc
7B
6A
5 GND
SP3481 and SP3485
10/15/02
SP3481/3485 Low Power Half-Duplex RS485 Transceivers
1
© Copyright 2002 Sipex Corporation
1 page  
D
VCC
R
VOD
R VOC
Figure 1. Driver DC Test Load Circuit
GENERATOR
(NOTE 1)
D
50Ω
VCC
CL
RL =
60Ω
OUT
CL = 15pF (NOTE 2)
Figure 3. Driver Differential Output Delay and Transition
Time Circuit
VDM
GENERATOR
(NOTE 1)
D
50Ω
VCC
S1
RL = 27Ω
OUT
CL = 15pF
(NOTE 2)
VOM =
VOH + VOL
2
1.5V
Figure 2. Driver Propagation Delay Test Circuit
GENERATOR
(NOTE 1)
S1
D
CL = 50pF
(NOTE 2)
50Ω
OUT
RL = 110Ω
VOM =
VOH + VOL
2
1.5V
Figure 4. Driver Enable and Disable Timing Circuit,
Output HIGH
0V OR 3V
S1
D
GENERATOR
(NOTE 1)
CL = 50pF
(NOTE 2)
50Ω
VCC
RL = 110Ω
OUT
Figure 5. Driver Enable and Disable Timing Circuit,
Output LOW
GENERATOR
(NOTE 1)
50Ω
VID R
OUT
CL = 15pF
(NOTE 2)
1.5V
0V
VOM = VCC
2
Figure 6. Receiver Propagation Delay Test Circuit
1.5V
-1.5V
S3
VID R
GENERATOR
(NOTE 1)
50Ω
1k
CL = 15pF
(NOTE 2)
S1
VCC
S2
Figure 7. Receiver Enable and Disable Timing Circuit
INPUTS
OUTPUTS
LINE
RE DE DI CONDITION B A
X 1 1 No Fault
01
X 1 0 No Fault
10
X0X
X
ZZ
Table 1. Transmit Function Truth Table
INPUTS
OUTPUTS
RE DE
A-B
R
0 0 +0.2V
1
0 0 -0.2V
0
0
0 Inputs Open
1
10
X
Z
Table 2. Receive Function Truth Table
10/15/02
SP3481/3485 Low Power Half-Duplex RS485 Transceivers
5
© Copyright 2002 Sipex Corporation
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet SP3481.PDF ] | |
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