PDF MC14553B Data sheet ( Hoja de datos )

Número de pieza	MC14553B
Descripción	3-Digit BCD Counter
Fabricantes	ON Semiconductor
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No Preview Available ! MC14553B 3-Digit BCD Counter The MC14553B 3–digit BCD counter consists of 3 negative edge triggered BCD counters that are cascaded synchronously. A quad latch at the output of each counter permits storage of any given count. The information is then time division multiplexed, providing one BCD number or digit at a time. Digit select outputs provide display control. All outputs are TTL compatible. An on–chip oscillator provides the low–frequency scanning clock which drives the multiplexer output selector. This device is used in instrumentation counters, clock displays, digital panel meters, and as a building block for general logic applications. • TTL Compatible Outputs • On–Chip Oscillator • Cascadable • Clock Disable Input • Pulse Shaping Permits Very Slow Rise Times on Input Clock • Output Latches • Master Reset MAXIMUM RATINGS (Voltages Referenced to VSS) (Note 1.) Symbol Parameter Value VDD Vin, Vout DC Supply Voltage Range Input or Output Voltage Range (DC or Transient) – 0.5 to +18.0 – 0.5 to VDD + 0.5 Unit V V Iin Input Current (DC or Transient) per Pin ±10 mA Iout Output Current (DC or Transient) per Pin +20 mA PD Power Dissipation, per Package (Note 2.) 500 mW TA Ambient Temperature Range Tstg Storage Temperature Range TL Lead Temperature (8–Second Soldering) – 55 to +125 – 65 to +150 260 °C °C °C 1. Maximum Ratings are those values beyond which damage to the device may occur. 2. Temperature Derating: Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this v vhigh–impedance circuit. For proper operation, Vin and Vout should be constrained to the range VSS (Vin or Vout) VDD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). Unused outputs must be left open. http://onsemi.com PDIP–16 P SUFFIX CASE 648 MARKING DIAGRAMS 16 MC14553BCP AWLYYWW 1 16 SOIC–16 DW SUFFIX CASE 751G 14553B AWLYYWW 1 A = Assembly Location WL or L = Wafer Lot YY or Y = Year WW or W = Work Week ORDERING INFORMATION Device Package Shipping MC14553BCP MC14553BDW PDIP–16 SOIC–16 25/Rail 47/Rail © Semiconductor Components Industries, LLC, 2000 March, 2000 – Rev. 3 1 Publication Order Number: MC14553B/D 1 page MC14553B UNITS CLOCK UNITS Q0 UNITS Q1 UNITS Q2 UNITS Q3 TENS CLOCK TENS Q0 TENS Q3 HUNDREDS CLOCK HUNDREDS Q0 HUNDREDS Q3 DISABLE (DISABLES CLOCK WHEN HIGH) OVERFLOW MASTER RESET SCAN OSCILLATOR DIGIT SELECT 1 DIGIT SELECT 2 DIGIT SELECT 3 UNITS TENS HUNDREDS UP AT 80 UP AT 980 UP AT 800 Figure 1. 3–Digit Counter Timing Diagram (Reference Figure 3) (a) PULSE GENERATOR 16 VDD C Q3 Q2 Q1 LE Q0 O.F. DIS DS1 DS2 MR DS3 8 VSS (b) GENERATOR 1 GENERATOR 2 GENERATOR 3 VDD C Q3 Q2 Q1 LE Q0 O.F. MR DS1 DS2 DIS DS3 VSS CL CL CL CL CL 20 ns CLOCK 90% 10% tPLH 20 ns BCD OUT 10% tTLH OVERFLOW 90% tPHL 50% tTHL tTLH CLOCK 50% 90% 10% tsu trem CL CL LATCH CL ENABLE CL 50% tPHL, tPLH CL BCD OUT 50% MASTER RESET tWL(cl) 50% 1/fcl tPHL 50% tsu tPHL 50% Figure 2. Switching Time Test Circuits and Waveforms tWH(R) http://onsemi.com 5 5 Page Notes MC14553B http://onsemi.com 11 11 Page

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