PDF MC14559B Data sheet ( Hoja de datos )

Número de pieza	MC14559B
Descripción	Successive Approximation Registers
Fabricantes	ON Semiconductor
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No Preview Available ! MC14549B, MC14559B Successive Approximation Registers The MC14549B and MC14559B successive approximation registers are 8–bit registers providing all the digital control and storage necessary for successive approximation analog–to–digital conversion systems. These parts differ in only one control input. The Master Reset (MR) on the MC14549B is required in the cascaded mode when more than 8 bits are desired. The Feed Forward (FF) of the MC14559B is used for register shortening where End–of–Conversion (EOC) is required after less than eight cycles. Applications for the MC14549B and MC14559B include analog–to–digital conversion, with serial and parallel outputs. • Totally Synchronous Operation • All Outputs Buffered • Single Supply Operation • Serial Output • Retriggerable • Compatible with a Variety of Digital and Analog Systems such as the MC1408 8–Bit D/A Converter • All Control Inputs Positive–Edge Triggered • Supply Voltage Range = 3.0 Vdc to 18 Vdc • Capable of Driving 2 Low–Power TTL Loads, 1 Low–Power Schottky TTL Load or 2 HTL Loads Over the Rated Temperature Range • Chip Complexity: 488 FETs or 122 Equivalent Gates MAXIMUM RATINGS (Voltages Referenced to VSS) (Note 1.) Symbol Parameter Value Unit VDD DC Supply Voltage Range –0.5 to +18.0 V Vin Input Voltage Range, All Inputs –0.5 to VDD + 0.5 V Iin DC Input Current, per Pin ±10 mA PD Power Dissipation, per Package (Note 2.) 500 mW TA Operating Temperature Range –55 to +125 °C Tstg Storage Temperature Range –65 to +150 °C 1. Maximum Ratings are those values beyond which damage to the device may occur. 2. Temperature Derating: Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high–impedance circuit. For proper operation, Vin and Vout should be constrained to the range VSS v (Vin or Vout) v VDD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). http://onsemi.com PDIP–16 P SUFFIX CASE 648 MARKING DIAGRAMS 16 MC145xxBCP AWLYYWW 1 16 SOIC–16 DW SUFFIX CASE 751G 145xxB AWLYYWW 1 xx A WL, L YY, Y WW, W = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week ORDERING INFORMATION Device Package Shipping MC14549BCP PDIP–16 25/Rail MC14549BDWR2 SOIC–16 1000/Tape & Reel MC14559BCP PDIP–16 25/Rail MC14559BDWR2 SOIC–16 1000/Tape & Reel © Semiconductor Components Industries, LLC, 2000 August, 2000 – Rev. 4 1 Publication Order Number: MC14549B/D 1 page PROGRAMMABLE PULSE GENERATOR MC14549B, MC14559B SWITCHING TIME TEST CIRCUIT AND WAVEFORMS VDD C SC FF(MR) D Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 EOC Sout VSS CL CL CL CL CL CL CL CL CL CL 1 fcl tWH(cl) C 50% tsu 50% SC D tsu tsu 50% tPLH tPHL Q7 50% 90% 10% tTLH tTHL Sout NOTE: Pin 10 = VSS tWH(D) tPLH 50% 90% 10% tTLH TIMING DIAGRAM CLOCK SC D Q7 ÉÉQ6 ÉÉQ5 ÉÉQ4 ÉÉQ3 ÉÉQ2 ÉÉQ1 ÉÉQ0 ÉÉEOC ÉÉSout INH Q7 Q6 INH Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Q8* INH ÉÉÉÉ— Don’t care condition INH — Indicates Serial Out is inhibited low. * — Q8 is ninth–bit of serial information available from 8–bit register. NOTE: Pin 10 = VSS http://onsemi.com 5 5 Page Notes MC14549B, MC14559B http://onsemi.com 11 11 Page

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