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PDF MC145583 Data sheet ( Hoja de datos )

Número de pieza MC145583
Descripción 3.3 Volt Only Driver/Receiver with an Integrated Standby Mode
Fabricantes Motorola Semiconductors 
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Product Preview
3.3 Volt Only
Driver/Receiver with an
Integrated Standby Mode
EIA–232–E and CCITT V.28
The MC145583 is a CMOS transceiver composed of three drivers and five
receivers that fulfills the electrical specifications of EIA–232–E, EIA–562, and
CCITT V.28 while operating from a single + 3.3 or + 5.0 V power supply. This
transceiver is a high–performance, low–power consumption device that is
equipped with a standby function.
A voltage tripler and inverter converts the + 3.3 V to ± 8.8 V, or a voltage
doubler and inverter converts the + 5.0 V to ± 8.8 V. This is accomplished
through an on–chip 40 kHz oscillator and five inexpensive external capacitors.
Drivers:
• ± 5 V Minimum Output Swing at 3.3 or 5.0 V Power Supply
300 Power–Off Impedance
Output Current Limiting
Three–State Outputs During Standby Mode
Receivers:
• ± 25 V Input Range
3 to 7 kInput Impedance
0.8 V Hysteresis for Enhanced Noise Immunity
Three–State Outputs During Standby Mode
Ring Monitor Circuit:
Invert the Input Level on Rx1 to Logic Output Level on RIMON at Standby
Mode
Order this document
by MC145583/D
MC145583
28
1
28
1
DW SUFFIX
SOG PACKAGE
CASE 751F
VF SUFFIX
SSOP
CASE 940J
ORDERING INFORMATION
MC145583DW SOG Package
MC145583VF SSOP
PIN ASSIGNMENT
C5+ 1
28 C2+
GND 2
27 VCC
C5– 3
RIMON 4
VSS 5
STB 6
Rx1 7
Rx2 8
Rx3 9
Tx1 10
Rx4 11
Tx2 12
Rx5 13
Tx3 14
26 C2–
RING
MONITOR
CIRCUIT
(INVERTING)
25
24
C1+
C1–
23 VDD
22 DO1
21 DO2
20 DO3
19 DI1
18 DO4
17 DI2
16 DO5
15 DI3
This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.
REV 3
1/96
©MOMoTtoOroRla,OInLc.A1996
MC145583
1

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MC145583 pdf
PIN DESCRIPTIONS
VCC
Digital Power Supply (Pin 27)
This digital supply pin is connected to the logic power sup-
ply. This pin should have a not less than 0.33 µF capacitor
GND.
GND
Ground (Pin 2)
Ground return pin is typically connected to the signal
ground pin of the EIA–232–E connector (Pin 7) as well as to
the logic power supply ground.
VDD
Positive Power Supply (Pin 23)
This is the positive output of the on–chip voltage tripler and
the positive power supply input of the driver/receiver sections
of the device. This pin requires an external storage capacitor
to filter the 50% duty cycle voltage generated by the charge
pump.
VSS
Negative Power Supply (Pin 5)
This is the negative output of the on–chip voltage tripler/in-
verter and the negative power supply input of the driver/ re-
ceiver sections of the device. This pin requires an external
storage capacitor to filter the 50% duty cycle voltage gener-
ated by the charge pump.
RIMON
Ring Monitor Circuit (Pin 4)
The Ring Monitor Circuit will convert the input level on Rx1
pin at standby mode and output on the RIMON pin.
STB
Standby Mode (Pin 6)
The device enters the standby mode while this pin is con-
nected to the logic high level. During the standby mode,
driver and receiver output pins become high–impedance
state. In this condition, supply current ICC is below 5 µA (typ).
C5+, C5–, C2+, C2–, C1+, C1–
Voltage Tripler and Inverter (Pins 1, 3, 28, 26, 25, 24)
These are the connections to the internal voltage tripler
and inverter, which generate the VDD and VSS voltages.
Rx1, Rx2, Rx3, Rx4, Rx5
Receive Data Inputs (Pins 7, 8, 9, 11, 13)
These are the EIA–232–E receive signal inputs. A voltage
between + 3 and + 25 V is decoded as a space, and causes
the corresponding DO pin to swing to GND (0 V). A voltage
between – 3 and – 25 V is decoded as a mark, and causes
the DO pin to swing up to VCC.
DO1, DO2, DO3, DO4, DO5
Data Outputs (Pins 22, 21, 20, 18, 16)
These are the receiver digital output pins, which swing
from VCC to GND. Output level of these pins is high imped-
ance while in standby mode.
DI1, DI2, DI3
Data Inputs (Pins 19, 17, 15)
These are the high impedance digital input pins to the
drivers. Input voltage levels on these pins must be between
VCC and GND.
Tx1, Tx2, Tx3
Transmit Data Output (Pins 10, 12, 14)
These are the EIA–232–E transmit signal output pins,
which swing toward VDD and VSS. A logic 1 at a DI input
causes the corresponding Tx output to swing toward VSS.
The actual levels and slew rate achieved will depend on the
output loading (RL/CL).
The minimum output impedance is 300 when turned off.
SWITCHING CHARACTERISTICS
DRIVER
DI1 – DI3
(INPUT)
Tx1 – Tx3
(OUTPUT)
tDPHL
50%
tf
90%
10%
tDPLH
+3V
0V
tr
VOH
VOL
DRIVER
STB (INPUT)
Tx1 – Tx3
(OUTPUT)
tDAZ
+ 1.5 V
+5V
–5V
HIGH Z
tDZA
+ 1.5 V
+ 3.3 V
0V
+ 5 V VOH
– 5 V VOL
RECEIVER
Rx1 – Rx5
(INPUT)
DO1 – DO5
(OUTPUT)
50%
tRPHL
90%
10%
tf
+3V
0V
tRPLH
VOH
VOL
tr
RECEIVER
STB (INPUT)
DO1 – DO5
(OUTPUT)
tRAZ
+ 1.5 V
90%
10%
HIGH Z
tRZA
+ 1.5 V
90%
+ 3.3 V
0V
VOH
10% VOL
MOTOROLA
MC145583
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