Datasheet.kr   

UC3638 데이터시트 PDF




Unitrode에서 제조한 전자 부품 UC3638은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


PDF 형식의 UC3638 자료 제공

부품번호 UC3638 기능
기능 Advanced PWM Motor Controller
제조업체 Unitrode
로고 Unitrode 로고


UC3638 데이터시트 를 다운로드하여 반도체의 전기적 특성과 매개변수에 대해 알아보세요.




전체 9 페이지수

미리보기를 사용할 수 없습니다

UC3638 데이터시트, 핀배열, 회로
UC1638
UC2638
UC3638
Advanced PWM Motor Controller
FEATURES
Single or Dual Supply Operation
Accurate High Speed Oscillator
Differential X5 Current Sense
Amplifier
Bidirectional Pulse-by-Pulse
Current Limiting
Programmable Oscillator
Amplitude and PWM Deadband
Dual 500mA Totem Pole Output
Drivers
Dual 60V, 50mA Open Collector
Drivers
Undervoltage Lockout
BLOCK DIAGRAM
DESCRIPTION
The UC1638 family of integrated circuits are advanced pulse width modula-
tors intended for a variety of PWM motor drive and amplifier applications re-
quiring either uni-directional or bi-directional drive circuits. Similar in
architecture to the UC1637, all necessary circuitry is included to generate an
analog error signal and modulate two bi-directional pulse train outputs in pro-
portion to the error signal magnitude and polarity.
Key features of the UC1638 include a programmable high speed triangle os-
cillator, a 5X differential current sensing amplifier, a high slew rate error am-
plifier, high speed PWM comparators, and two 50mA open collector as well
as two ±500mA totem pole output stages. The individual circuit blocks are
designed to provide practical operation to switching frequencies of 500kHz.
Significant improvements in circuit speed, elimination of many external pro-
gramming components, and the inclusion of a differential current sense am-
plifier, allow this controller to be specified for higher performance
applications, yet maintain the flexibility of the UC1637. The current sense
amplifier in conjunction with the error amplifier can be configured for average
current feedback. The additional open collector outputs provide a drive signal
continued
1/98
UDG-95048-4




UC3638 pdf, 반도체, 판매, 대치품
UC1638
UC2638
UC3638
ELECTRICAL CHARACTERISTICS
(continued)
Unless otherwise specified; VCC = 15V, VEE =–15V, CT = 680pF, RT = 3k,
VPVSET = 1.5V, VCOMP = 0V, VCSOUT = 0V, VDB = REF, VEXTREF = 0V, VSD =
VCC – 3V, TA = 55°C to 125°C for the UC1638, 25°C to 85°C for the UC2638,
0°C to 70°C for the UC3638. TA = TJ.
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNITS
X5 Amplifier
Gain
Common Mode Rejection
3dB Bandwidth
Slew Rate Rising
Slew Rate Falling
VID = 100mV to 400mV
VCS+, VCS= AREF ±5V
4.75 5 5.25 V/V
50 65
dB
300 400
kHz
.75 1.5
V/µs
.75 1.5
V/µs
Shutdown
Threshold
Input Bias Current
Ref. to VCC
VSD = SD Threshold
1.9 2.25 2.5
0.5 10
V
µA
Current Limit
Threshold Positive
Measured Between CS+ and CS-
400 500 600 mV
Threshold Negative
Propagation Delay to Outputs
Measured Between CS+ and CS-
Overdrive = 200mV
– 600 500 – 400 mV
150 250 ns
Deadband Adjust
Maximum Deadband
VDB = 0V
±5 V
Zero Deadband
Deadband Adjustment Gain
VDB = REF
VDB = 1V to 4V (Note 2)
0V
± 0.9 ± 1 ± 1.2 V/V
Input Bias Current
VDB = VREF
3 15 µA
AREF Buffer
Gain
AREF / VCC VEE
0.49 0.5 0.51 V/V
Offset
(Note 3)
30 100 mV
Note 1: Oscillator triangle amplitude = 2.5 • PV ±AREF.
Note 2: Deadband = ±(REF DB), referenced to COMP.
Note 3: Offset = AREFIN AREF.
PIN DESCRIPTIONS
AOUT1, BOUT1: AOUT1 and BOUT1 are open collector
output drivers capable of sinking 50mA. These outputs
can be pulled up to 60V maximum. With a few external
components, these outputs can drive the opposite high
side switches in a full bridge arrangement.
AOUT2, BOUT2: AOUT2 and BOUT2 are totem pole
output drivers capable of driving external power MOS-
FETs directly. The peak current ratings are ±500mA. An
integrated zener clamp limits the drive output amplitude
to approximately 14V to prevent MOSFET gate oxide
overstress. These outputs are configured to drive the
opposite low side switches in a full bridge arrangement.
AREF: The voltage on AREF is simply a buffered ver-
sion of the voltage on AREFIN. In single supply applica-
tions, AREF should be bypassed to VEE with a 0.1µF
ceramic capacitor to provide a stable reference level for
the internal circuitry.
AREFIN: The voltage on AREFIN is generated inter-
nally by a 50% voltage divider tied between VCC and
VEE. As such, it provides the mid supply reference
needed for the oscillator, voltage amplifier, current am-
plifier and current limit comparators when operating in
single supply mode. A buffer amplifier is connected be-
tween AREFIN and AREF. In bipolar supply applications
AREFIN is usually connected to VEE, which disables
the buffer amplifier, and AREF is connected to 0V.
COMP: This is the output of the high slew rate error am-
plifier. The level on COMP modulates the controller duty
cycle via the PWM comparators and the oscillator ramp.
Compensation and DC gain setting resistors are con-
nected between COMP and INV.
CS-: This is the inverting input to the X5 current sense
amplifier. The common mode input range for this pin ex-
tends from VEE1V to VCC4V. A low value resistor in
4

4페이지










UC3638 전자부품, 판매, 대치품
APPLICATION INFORMATION (cont.)
will be half way between ground and VCC, and will auto-
matically track changes in VCC. For cases where a dif-
ferent null point is desired, AREF can be tied to any
voltage between VEE + 2V and VCC 2V. Of course the
user must also allow sufficient headroom for the triangle
waveform.
Once the system null point has been chosen, the trian-
gle wave amplitude and PWM deadband must be pro-
grammed. The amplitude of the triangle wave is
determined by trading off noise immunity and gain re-
quirements. In general, the larger the triangle wave am-
plitude, the greater the immunity to premature
termination of PWM pulses due to switching noise. How-
ever, high amplitude triangle waves require a greater
voltage swing at the output of the voltage amplifier
which ultimately reduces forward loop gain.
Programming the PWM deadband allows the user to
trade off gain linearity requirements with power amplifier
efficiency. If the modulator is configured as in Figure 1,
motor current is alternately pulsed by diagonally oppo-
site drive FETs when the servo loop is at null. By adjust-
ing the deadband, the user can program the offset
voltage at the input of the PWM comparators. This offset
results in deadtime, or time when neither PWM signal is
active.
A minimum amount of deadtime is always recom-
mended to provide cross conduction protection at the
power amplifier. Setting the deadtime to this minimum
level will provide the maximum motor stiffness or holding
torque, at the expense of power losses in the output
stage. These losses result from the fact that the power
amplifier is always sourcing motor current, even at null.
As deadtime is increased, amplifier losses at null be-
come less, at the expense of nonlinearity in the gain
function. Eventually, if the deadband voltage is in-
creased to equal the amplitude of the triangle wave, er-
ror voltages at the null point will result in no PWM
pulsing, or a dead zone. After the triangle waveform am-
plitude and deadband are selected, the operating fre-
quency is easily set by proper selection of CT and RT.
Referring to Figure 1, if the voltage supply rails are
±15V, and the desired triangle wave oscillator amplitude
is 6V p-p, PVSET is set by:
VPK VVLY = 5 • VPVSET
VPVSET = 6 = 1.2V
5
If 1V of deadband is chosen:
5 VDB = 1V
VDB = 4V
UC1638
UC2638
UC3638
In order to select the programming resistors, a source
current for the reference is first selected. For a 1mA
source current:
R3 + R4 + R5 = 5 = 5 = 5k
ISOURCE 1mA
R3 = 5 - VDB = 1V = 1k
ISOURCE 1mA
R4 = VDB - VPVSET = 4V - 1.2V = 2.8k
ISOURCE
1mA
R5 = 5k 1k 2.8k = 1.2k
All of the voltages described by these equations are ref-
erenced to the negative supply rail. In other words, for a
split supply system, VREF is actually a negative voltage
referenced to ground.
The oscillator frequency is programmed by proper se-
lection of RT and CT. If 220pF is chosen for CT, and an
operating frequency of 30kHz is desired, RT is chosen
by:
F= 1
5 RT CT
30kHz =
1
5 220pF RT
RT = 30k
With RT = 30k, the charge current out of the RT pin is
limited to
1.2V = 40µA,
30k
which is well within the specified maximum of 1mA.
To calculate the actual deadtime or minimum time be-
tween PWM pulses (TDB), the ratio of the deadband
voltage to the triangle wave amplitude is multiplied by
half the oscillator period:
TDB = DB 1
VPK - VVLY f
= 5 - VDB (5 RT CT)
5 VPVSET
= (5 - VDB) RT CT
VPVSET
For this example the deadtime is:
TDB = 130k 220pF = 5.5µsec
1.2
If voltage feedforward is desired, PVSET should be de-
rived off of the supply rails instead of VREF. This way
changes in the supply voltage will linearly regulate the
modulator gain, which decreases control loop suscepti-
bility to line voltage variations. Since the voltage on the
RT pin is a buffered version of PVSET, charge current
tracks oscillator amplitude, and therefore the frequency
7

7페이지


구       성 총 9 페이지수
다운로드[ UC3638.PDF 데이터시트 ]

당사 플랫폼은 키워드, 제품 이름 또는 부품 번호를 사용하여 검색할 수 있는

포괄적인 데이터시트를 제공합니다.


구매 문의
일반 IC 문의 : 샘플 및 소량 구매
-----------------------------------------------------------------------

IGBT, TR 모듈, SCR 및 다이오드 모듈을 포함한
광범위한 전력 반도체를 판매합니다.

전력 반도체 전문업체

상호 : 아이지 인터내셔날

사이트 방문 :     [ 홈페이지 ]     [ 블로그 1 ]     [ 블로그 2 ]



관련 데이터시트

부품번호상세설명 및 기능제조사
UC3633

Phase Locked Frequency Controller

Unitrode
Unitrode
UC3634

Phase Locked Frequency Controller

Unitrode
Unitrode

DataSheet.kr       |      2020   |     연락처      |     링크모음      |      검색     |      사이트맵