|
|
PDF AMU2481 Data sheet ( Hoja de datos )
| Número de pieza | AMU2481 | |
| Descripción | Audio Mixer | |
| Fabricantes | Micronas | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de AMU2481 (archivo pdf) en la parte inferior de esta página. Total 25 Páginas | ||
|
No Preview Available !
MICRONAS
INTERMETALL
AMU 2481
Audio Mixer
Edition August 3, 1992
6251-324-3E
MICRONAS
1 page  
AMU 2481
2. Architecture of the AMU 2481 and Functional De-
scription
As already mentioned in section 1., the AMU 2481 archi-
tecture combines two main parts, the I/O blocks and the
DSP core. Fig. 1–3 shows a block diagram of the archi-
tecture.
2.1. I/O Blocks
2.1.1. Digital Decimation Filters
The digital decimation filters are cascades of transversal
and recursive lowpass filters. They are required to con-
vert the two 1–bit PDM data streams by stepwise reduc-
tion of bandwidth and word rate (sampling rate) into two
PCM data streams with 16 bit word length and a sam-
pling rate of approximately 32 kHz, which in the following
are called PCM data 1 and 2. They are temporarily
stored in the corresponding locations of the AMU’s data
RAM.
As the two PDM data streams at the input of the decima-
tion filters have no separate clock signal, the decimation
filters are equipped with a synchronization facility. This
feature also supplies the AMU software with the sam-
pling clock (approx. 32 kHz), which is called ”I/O Sync”
or IOSYNC. More details on data/clock timing can be
found in section 2.3.
S–Ident
S–Clock
S–Data
H
L
H
L
H
L
S–Ident
H
L
S–Clock
H
L
S–Data
H
L
64 Clock Cycles
16 Bit Sound 1 16 Bit Sound 2 16 Bit Sound 3 16 Bit Sound 4
AB
Section A
Section B
tS6
tS1 tS2
tS3
tS4 tS5
LSB of Sound 1
MSB of Sound 4
Fig. 2–1: S bus waveforms
MICRONAS INTERMETALL
5
5 Page 
AMU 2481
3.4. J17 Digital Deemphasis (Only for S–Data)
A J17 digital deemphasis is included in all S bus chan-
nels. This is important in the case of D2–MAC mode. For
test purposes or for future digital sources without J17
preemphasis this function can be switched off (linear fre-
quency response). Fig. 3–2 shows the frequency re-
sponse. The control procedure is:
J17 deemphasis on:
Φ Main Clock
KRJ17 (k28)
KNJ17 (k29)
18.432 MHz
116 (0.90625)
11 (0.0859375)
17.732 MHz
117 (0.9140625)
10 (0.078125)
J17 deemphasis off:
Φ Main Clock
KRJ17 (k28)
KNJ17 (k29)
18.432 MHz
0 (0.0)
118 (0.921875)
17.732 MHz
0 (0.0)
118 (0.921875)
dB
5.0
0.0
–5.0
–10.0
–15.0
–20.0
100.0
1000.0
10000.0
Hz
Fig. 3–2: J17 deemphasis frequency response
3.5. Medium Quality Oversampling Filter
Two oversampling filters in the S bus channels 3 and 4
allow to mix the D2–MAC medium–quality signals (16
kHz sampling rate) with the high–quality signals (32 kHz
sampling rate). It is a third–order Cauer–type lowpass
with a stopband attenuation of 40 dB. The frequency re-
sponse is shown in Fig. 3–3. There are three selection
modes regarding the oversampling filters:
both filters switched on:
KOVERS (k30) = 129 (–0.992 1875)
both filters switched off:
KOVERS (k30) = 127 (0.992 187 5)
MICRONAS INTERMETALL
one filter is switched on channel 3:
KOVERS (k30) = 0 (0.0)
dB
10
0
–10
–20
–30
–40
–50
–60
0
2.5 5
7.5
10
12.5
15 kHz
Fig. 3–3: Oversampling filter frequency response
3.6. Audio Mixing Section
This basic feature allows to route any input to every out-
put and of course to mix different–weighted input chan-
nels. Due to the three shift–left (SHAL) at the matrix out-
put a coefficient of 16 (= 0.125) corresponds to a 1:1 ratio
of input to output. Table 3–2 shows the coefficients and
their meaning.
Table 3–2: Output matrix coefficients
Output
Channel
Ch1:
Ch2:
Ch3:
Ch4:
Coefficient Connection
to Source
KS1L1 (k02)
KS2L1 (k03)
KS3L1 (k04)
KS4L1 (k05)
KP1L1 (k06)
KP2L1 (k07)
S bus channel 1
S bus channel 2
S bus channel 3
S bus channel 4
PDM 1
PDM 2
KS1R1 (k08)
KS2R1 (k09)
KS3R1 (k10)
KS4R1 (k11)
KP1R1 (k12)
KP2R1 (k13)
S bus channel 1
S bus channel 2
S bus channel 3
S bus channel 4
PDM 1
PDM 2
KS1L2 (k14)
KS2L2 (k15)
KS3L2 (k16)
KS4L2 (k17)
KP1L2 (k18)
KP2L2 (k19)
S bus channel 1
S bus channel 2
S bus channel 3
S bus channel 4
PDM 1
PDM 2
KS1R2 (k20)
KS2R2 (k21)
KS3R2 (k22)
KS4R2 (k23)
KP1R2 (k24)
KP2R2 (k25)
S bus channel 1
S bus channel 2
S bus channel 3
S bus channel 4
PDM 1
PDM 2
11
11 Page | ||
| Páginas | Total 25 Páginas | |
| PDF Descargar | [ Datasheet AMU2481.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| AMU2481 | Audio Mixer | Micronas |
| AMU2481VS | Audio Processor for Video Recoders and Satellite Receivers | Micronas |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |