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PDF MC14568B Data sheet ( Hoja de datos )
| Número de pieza | MC14568B | |
| Descripción | Phase Comparator and Programmable Counters | |
| Fabricantes | Motorola Semiconductors | |
| Logotipo |  |
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Phase Comparator and
Programmable Counters
The MC14568B consists of a phase comparator, a divide–by–4, 16, 64 or
100 counter and a programmable divide–by–N 4–bit binary counter (all
positive–edge triggered) constructed with MOS P–channel and N–channel
enhancement mode devices (complementary MOS) in a monolithic structure.
The MC14568B has been designed for use in conjunction with a
programmable divide–by–N counter for frequency synthesizers and phase–
locked loop applications requiring low power dissipation and/or high noise
immunity.
This device can be used with both counters cascaded and the output of
the second counter connected to the phase comparator (CTL high), or used
independently of the programmable divide–by–N counter, for example
cascaded with a MC14569B, MC14522B or MC14526B (CTL low).
• Supply Voltage Range = 3.0 to 18 V
• Capable of Driving Two Low–Power TTL Loads, One Low–Power
Schottky TTL Load or Two HTL Loads Over the Rated Temperature
Range.
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎΕ Chip Complexity: 549 FETs or 137 Equivalent Gates
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎMAXIMUM RATINGS* (Voltages referenced to VSS)
Rating
Symbol
Value
Unit
DC Supply Voltage
Input Voltage, All Inputs
DC Input Current, per Pin
Power Dissipation, per Package†
Operating Temperature Range
Storage Temperature Range
VDD
Vin
Iin
PD
TA
Tstg
– 0.5 to + 18
Vdc
– 0.5 to VDD + 0.5 Vdc
± 10 mAdc
500 mW
– 55 to + 125
_C
– 65 to + 150
_C
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
Ceramic “L” Packages: – 12 mW/_C From 100_C To 125_C
BLOCK DIAGRAM
MC14568B
L SUFFIX
CERAMIC
CASE 620
P SUFFIX
PLASTIC
CASE 648
D SUFFIX
SOIC
CASE 751B
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBD
Plastic
Ceramic
SOIC
TA = – 55° to 125°C for all packages.
TRUTH TABLE
F
Pin 10
0
0
1
1
G
Pin 11
0
1
0
1
Division Ratio
of Counter D1
4
16
64
100
The divide by zero state on the pro-
grammable divide–by–N 4–bit binary
counter, D2, is illegal.
PCin 14
(REF.)
A PHASE
B COMPARATOR
13 PCout
12 LD
C1 9
CTL 15
“0” 3
PE 2
TG
TG
COUNTER D1
4–BIT
PROGRAMMABLE
COUNTER D2
TG
VDD = PIN 16
VSS = PIN 8
DP3 DP0
4 567
DP2 DP1
REV 3
1/94
©MMOotoTrOolaR, IOncL. A199C5MOS LOGIC DATA
11 G
PCin
10 F
1 Q1/C2
C1
“0”
CTL HIGH
P/C
PCout PCin
LD
D1 C1
D2 “0”
Q1/C2
CTL LOW
PCout
P/C
LD
D1
D2
Q1/C2
MC14568B
1
1 page  
14
PCin
A
LOGIC DIAGRAM
13
PCout
9
C1
10
F
11
G
B (REF.)
D
Q
C
C
3
“0”
COUNTER
D2
C
Q
D
4
DP3
MOTOROLA CMOS LOGIC DATA
5
DP2
DQ
C
Q
LD
COUNTER
D1
1
Q1/C2
15
CTL
PE
2
PE
VDD = PIN 16
VSS = PIN 8
67
DP1 DP0
MC14568B
5
5 Page 
OUTLINE DIMENSIONS
L SUFFIX
CERAMIC DIP PACKAGE
CASE 620–10
ISSUE V
–A–
16 9
–B–
18
CL
–T–
SEATING
PLANE
F
NK
E
G
D 16 PL
0.25 (0.010) M T A S
M
J 16 PL
0.25 (0.010) M T B S
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
BODY.
INCHES
MILLIMETERS
DIM MIN MAX MIN MAX
A 0.750 0.785 19.05 19.93
B 0.240 0.295 6.10 7.49
C ––– 0.200 ––– 5.08
D 0.015 0.020 0.39 0.50
E 0.050 BSC
1.27 BSC
F 0.055 0.065 1.40 1.65
G 0.100 BSC
2.54 BSC
H 0.008 0.015 0.21 0.38
K 0.125 0.170 3.18 4.31
L 0.300 BSC
7.62 BSC
M 0_ 15_ 0_ 15_
N 0.020 0.040 0.51 1.01
–A–
16
1
H
G
P SUFFIX
PLASTIC DIP PACKAGE
CASE 648–08
ISSUE R
9
B
8
FC
S
L
–T–
SEATING
PLANE
KJ
D 16 PL
0.25 (0.010) M T A M
M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
INCHES
MILLIMETERS
DIM MIN MAX MIN MAX
A 0.740 0.770 18.80 19.55
B 0.250 0.270 6.35 6.85
C 0.145 0.175 3.69 4.44
D 0.015 0.021 0.39 0.53
F 0.040 0.70 1.02 1.77
G 0.100 BSC
2.54 BSC
H 0.050 BSC
1.27 BSC
J 0.008 0.015 0.21 0.38
K 0.110 0.130 2.80 3.30
L 0.295 0.305 7.50 7.74
M 0_ 10_ 0_ 10 _
S 0.020 0.040 0.51 1.01
MOTOROLA CMOS LOGIC DATA
MC14568B
11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet MC14568B.PDF ] | |
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