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A82C250 데이터시트, 핀배열, 회로
INTEGRATED CIRCUITS
DATA SHEET
www.DataSheet4U.com
PCA82C250
CAN controller interface
Product specification
Supersedes data of 1997 Oct 21
File under Integrated Circuits, IC18
2000 Jan 13




A82C250 pdf, 반도체, 판매, 대치품
Philips Semiconductors
CAN controller interface
Product specification
PCA82C250
FUNCTIONAL DESCRIPTION
The PCA82C250 is the interface between the CAN
protocol controller and the physical bus. It is primarily
intended for high-speed applications (up to 1 Mbaud) in
cars. The device provides differential transmit capability to
the bus and differential receive capability to the CAN
controller. It is fully compatible with the “ISO 11898”
www.DataShesetta4nUd.caormd.
A current limiting circuit protects the transmitter output
stage against short-circuit to positive and negative battery
voltage. Although the power dissipation is increased
during this fault condition, this feature will prevent
destruction of the transmitter output stage.
If the junction temperature exceeds a value of
approximately 160 °C, the limiting current of both
transmitter outputs is decreased. Because the transmitter
is responsible for the major part of the power dissipation,
this will result in a reduced power dissipation and hence a
lower chip temperature. All other parts of the IC will remain
in operation. The thermal protection is particularly needed
when a bus line is short-circuited.
The CANH and CANL lines are also protected against
electrical transients which may occur in an automotive
environment.
Pin 8 (Rs) allows three different modes of operation to be
selected: high-speed, slope control or standby.
For high-speed operation, the transmitter output
transistors are simply switched on and off as fast as
possible. In this mode, no measures are taken to limit the
rise and fall slope. Use of a shielded cable is
recommended to avoid RFI problems. The high-speed
mode is selected by connecting pin 8 to ground.
For lower speeds or shorter bus length, an unshielded
twisted pair or a parallel pair of wires can be used for the
bus. To reduce RFI, the rise and fall slope should be
limited. The rise and fall slope can be programmed with a
resistor connected from pin 8 to ground. The slope is
proportional to the current output at pin 8.
If a HIGH level is applied to pin 8, the circuit enters a low
current standby mode. In this mode, the transmitter is
switched off and the receiver is switched to a low current.
If dominant bits are detected (differential bus voltage
>0.9 V), RXD will be switched to a LOW level.
The microcontroller should react to this condition by
switching the transceiver back to normal operation (via
pin 8). Because the receiver is slow in standby mode, the
first message will be lost.
Table 1 Truth table of the CAN transceiver
SUPPLY
4.5 to 5.5 V
4.5 to 5.5 V
<2 V (not powered)
2 V < VCC < 4.5 V
2 V < VCC < 4.5 V
TXD
0
1 (or floating)
X(1)
>0.75VCC
X(1)
Note
1. X = don’t care.
CANH
HIGH
floating
floating
floating
floating if
VRs > 0.75VCC
CANL
LOW
floating
floating
floating
floating if
VRs > 0.75VCC
BUS STATE
dominant
recessive
recessive
recessive
recessive
RXD
0
1
X(1)
X(1)
X(1)
Table 2 Pin Rs summary
CONDITION FORCED AT PIN Rs
VRs > 0.75VCC
10 µA < IRs < 200 µA
VRs < 0.3VCC
MODE
standby
slope control
high-speed
RESULTING VOLTAGE OR CURRENT AT PIN Rs
IRs < 10 µA
0.4VCC < VRs < 0.6VCC
IRs < 500 µA
2000 Jan 13
4

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A82C250 전자부품, 판매, 대치품
Philips Semiconductors
CAN controller interface
Product specification
PCA82C250
SYMBOL
PARAMETER
CONDITIONS
Rdiff differential input resistance
Ci CANH, CANL input capacitance
Cdiff differential input capacitance
Reference output
www.DataSheeVt4reUf.com reference output voltage
V8 = 1 V;
50 µA < I5 < 50 µA
V8 = 4 V;
5 µA < I5 < 5 µA
Timing (see Figs 4, 6 and 7)
tbit
tonTXD
toffTXD
tonRXD
toffRXD
tonRXD
toffRXD
SR
minimum bit time
delay TXD to bus active
delay TXD to bus inactive
delay TXD to receiver active
delay TXD to receiver inactive
delay TXD to receiver active
delay TXD to receiver inactive
differential output voltage slew
rate
V8 = 1 V
V8 = 1 V
V8 = 1 V
V8 = 1 V
V8 = 1 V; VCC < 5.1 V;
Tamb < +85 °C
V8 = 1 V; VCC < 5.1 V;
Tamb < +125 °C
V8 = 1 V; VCC < 5.5 V;
Tamb < +85 °C
V8 = 1 V; VCC < 5.5 V;
Tamb < +125 °C
R8 = 47 k
R8 = 24 k
R8 = 47 k
R8 = 24 k
R8 = 47 k
tWAKE
wake-up time from standby
(via pin 8)
tdRXDL
bus dominant to RXD LOW
V8 = 4 V; standby mode
Standby/slope control (pin 8)
V8
I8
Vstb
Islope
Vslope
input voltage for high-speed
input current for high-speed
input voltage for standby mode
slope control mode current
slope control mode voltage
V8 = 0 V
Note
1. I1 = I4 = I5 = 0 mA; 0 V < V6 < VCC; 0 V < V7 < VCC; V8 = VCC.
MIN.
20
0.45VCC
0.4VCC
0.75VCC
10
0.4VCC
TYP.
40
55
82
82
90
90
390
260
260
210
14
MAX.
100
20
10
UNIT
k
pF
pF
0.55VCC V
0.6VCC V
1 µs
50 ns
80 ns
120 ns
150 ns
170 ns
170 ns
190 ns
520 ns
320 ns
450 ns
320 ns
V/µs
20 µs
3 µs
0.3VCC
500
200
0.6VCC
V
µA
V
µA
V
2000 Jan 13
7

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