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부품번호 LF13508 기능
기능 (LF13509) 8-Channel Analog Multiplexer
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LF13508 데이터시트, 핀배열, 회로
January 1995
LF13508 8-Channel Analog Multiplexer
LF13509 4-Channel Differential Analog Multiplexer
General Description
The LF13508 is an 8-channel analog multiplexer which con-
nects the output to 1 of the 8 analog inputs depending on
the state of a 3-bit binary address An enable control allows
disconnecting the output thereby providing a package se-
lect function
This device is fabricated with National’s BI-FET technology
which provides ion-implanted JFETs for the analog switch
on the same chip as the bipolar decode and switch drive
circuitry This technology makes possible low constant
‘‘ON’’ resistance with analog input voltage variations This
device does not suffer from latch-up problems or static
charge blow-out problems associated with similar CMOS
parts The digital inputs are designed to operate from both
TTL and CMOS levels while always providing a definite
break-before-make action
The LF13509 is a 4-channel differential analog multiplexer
A 2-bit binary address will connect a pair of independent
analog inputs to one of any 4 pairs of independent analog
outputs The device has all the features of the LF13508
series and should be used whenever differential analog in-
puts are required
Features
Y JFET switches rather than CMOS
Y No static discharge blow-out problem
Y No SCR latch-up problems
Y Analog signal range 11V b15V
Y Constant ‘‘ON’’ resistance for analog signals between
b11V and 11V
Y ‘‘ON’’ resistance 380 X typ
Y Digital inputs compatible with TTL and CMOS
Y Output enable control
Y Break-before-make action tOFFe0 2 ms tONe2 ms typ
Y Lower leakage devices available
Functional Diagrams and Truth Tables
LF13508
LF13509
SWITCH
EN A2 A1 A0
ON
HLLL
H L LH
HLHL
H LHH
HHL L
HHLH
H HH L
HHHH
L XXX
S1
S2
S3
S4
S5
S6
S7
S8
NONE
EN A1 A0 SWITCH
PAIR ON
L XX
HLL
HLH
HHL
HHH
None
S1
S2
S3
S4
C1995 National Semiconductor Corporation TL H 5668
TL H 5668 – 1
RRD-B30M115 Printed in U S A




LF13508 pdf, 반도체, 판매, 대치품
AC Test Circuit and Switching Time Waveforms (Continued)
FIGURE 2 Enable Times
FIGURE 3 Break-Before-Make
Transition Times and Transients
TL H 5668 – 4
TL H 5668–5
TL H 5668 – 6
TL H 5668–7
Test Circuit
TL H 5668 – 8
TL H 5668–9
4
TL H 5668 – 10

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LF13508 전자부품, 판매, 대치품
Typical Applications
A SIMPLIFIED SYSTEM DISCUSSION
DATA ACQUISITION SYSTEM
TABLE I
Analog multiplexers (MUX) are usually used for multi-chan-
nel Data Acquisition Units (DAU) Figure 5 shows a system
in which 8 different analog inputs are sampled and convert-
ed into digital words for further processing The sample and
hold circuit is optional depending on input speed require-
ments and on A D converter speed
Parameters characterizing the system are
System Channels The number of multiplexer channels
ERROR %
02
0 05
0 01
0 0008
BITS
8
10
12
16
ts(ON)
TO 1 2 LSB
6 2t
7 6t
9t
11 8t
Accuracy The conversion accuracy of each individual sam-
ple with the system operating at the throughput rate
llt e CS (RON a RS) RIN
Speed or Throughput Rate Number of samples second
channel the system can handle
For a discussion on system structure addressing mode and
processor interfacing see application note AN-159
A ACCURACY CONSIDERATIONS
1 Multiplexer’s Influence on System Accuracy (Figure 6)
a The error (E) caused by the finite ‘‘ON’’ resist-
ance RON of the multiplexing switches is given
by
100
E(%) e
where
1 a RIN (RON a RS a DRON)
RIN e following stage input impedance
DRON e ‘‘ON’’ resistance modulation which is
negligible for JFET switches like the LF11508
Example Let RON e 450 X DRON e 0 RS e 0 TA
e 25 C and allowable E e 0 01% which is equivalent
to 1 2 LSB in a 12-bit system
ts(OFF) is the time it takes to discharge CS within
a tolerable error The ‘‘OFF’’ settling time should
be taken into account for bipolar inputs where its
effects will appear as a worse case of doubling
of the ts(ON)
2 Sample and Hold Influence on System Accuracy
The sample and hold if used also introduces errors into
the system accuracy due to
 Offset voltage of sample and hold
 Droop rate in the Hold mode
 TA Aperture time or time delay between the time of a
digital Hold command and the actual Hold occurance
 Taq Acquisition time or time it takes to acquire an
analog input and settle within a predetermined error
band
 Hold step Error created during the Sample to Hold
mode caused by an undesirable charge injected into
the Hold capacitor Ch
For more details on sample and hold errors see the
LF198 LF298 LF398 data sheet
3 A D Converter Influence on System Accuracy
RIN
e RON(100 b E) e 4 5 MX
min E
Note that if temperature effects are included some
gain (or full scale) drift will occur but effects on linearity
are small
b Multiplexer settling time (ts)
ts(ON) is the time required for the MUX output to
settle within a predetermined accuracy as
shown in Table I
The ‘‘accuracy’’ of the A D converter is the best possible
system accuracy In most data acquisition systems the
A D converter is the most expensive single component
so its error will often dominate system error Care should
be taken that MUX S H and input source errors do not
exceed system error requirements when added to A D
errors For instance if an 8-bit accuracy system is desired
and an 8-bit A D converter is used the accuracy of the
MUX and S H should be far better than 8 bits
For details on A D converter specifications see AN-156
CS (Figure 6) MUX output capacitance a fol-
lowing stage input capacitance a any stray ca-
pacitance at this node
FIGURE 5 Random-Addressed Multiplexed DAU
7
FIGURE 6 8-Channel MUX
TL H 5668 – 13

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