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PDF STAC9708 Data sheet ( Hoja de datos )

Número de pieza STAC9708
Descripción (STAC9711) Multi-Channel AC97 Codec With Multi-Codec Option
Fabricantes Hynix Semiconductor 
Logotipo Hynix Semiconductor Logotipo



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No Preview Available ! STAC9708 Hoja de datos, Descripción, Manual

SigmaTel, Inc.
Integrating Mixed-Signal Solutions
PRELIMINARY
STAC9708/11
Multi-Channel AC'97 Codec
With Multi-Codec Option
GENERAL DESCRIPTION:
SigmaTel’s STAC9708/11 is a general purpose 18-bit, full duplex, audio codec that conforms to the analog
component specification of AC'97 (Audio Codec 97 Component Specification Rev. 2.1). The STAC9708/11
incorporates SigmaTel’s proprietary Sigma-Delta technology to achieve a DAC SNR in excess of 95dB. The
DACs, ADCs, and mixer are integrated with analog I/Os, which include four analog line-level stereo inputs, two
analog line-level mono inputs, two stereo outputs, and one mono output channel. Also included are two
additional high quality DACs, with independent volume control, for multi-channel applications. With
SigmaTel’s 3D stereo enhancement (SS3D), independently selectable on both LINE OUT and DAC OUT, the
multi-channel mode immerses the user in a richer and livelier listening experience. The STAC9708/11 may be
used as a secondary codec, with the STAC9704/07 as the primary, in a multiple codec configuration conforming
to the AC'97 Rev. 2.1 specification. This configuration can provide true six-channel, AC-3 playback required for
DVD applications. The STAC9708/11 communicates via the five-wire AC-Link to any digital component of
AC'97 providing flexibility in the audio system design. Packaged in an AC'97 compliant 48-pin TQFP, the
STAC9708/11 can be placed on the motherboard, daughter boards, add-on cards or PCMCIA cards.
FEATURES:
High performance Σ ∆ technology
Two additional high quality DAC’s
for multi-channel applications
18-bit full duplex stereo ADC, DACs
AC-Link protocol compliance
Multiple power supply options
Pin compatible with the STAC9704/07
SigmaTel Surround (SS3D) Stereo
Enhancement
Energy saving power down modes
Multi-Codec option (Intel AC'97 rev 2.1)
Six analog line-level inputs
48-pin TQFP
SNR > 95 dB through Mixer and DAC
1 10/02/98

1 page




STAC9708 pdf
SigmaTel, Inc
Preliminary
STAC9708/11
Table of Contents – Tables
Table 1 – Package Dimensions
6
Table 2 – Pin Designation
6
Table 3 – Digital Signal List
9
Table 4 – Analog Signal List
10
Table 5 – Filtering and Voltage References
11
Table 6 – 9708/11 Power Signal List
11
Table 7 –Mixer Functional Connections
24
Table 8 – Programming Registers
25
Table 9 – Play Master Volume Register
26
Table 10 – PC Beep Register
27
Table 11 – Analog Mixer Input Gain Register 27
Table 12, 13 – Record Select Control Registers 28
Table 14 – Record Gain Registers
29
Table 15 – General Purpose Registers
29
Table 16, 17 – 3D Control Registers
30
Table 18– Multi-Channel Programming
Register
31
Table 19 – Powerdown Status Registers
31
Table 20 – Low Power Modes
32
Table 21 - Codec ID Selection
36
Table 22 - Secondary Codec Register Access
Slot 0 Bit Definitions
37
Table 23 – Cold Reset
36
Table 24 – Warm Reset
36
Table 25 – Clocks
37
Table 26 – Data Setup and Hold
38
Table 27 – Signal Rise and Fall Times
39
Table 28 – AC-Link Low Power Mode Timing 40
Table 30 – Operating Conditions
Table 28 – Power Consumption
Table 29 – AC-Link Static Specifications
Table 30 – 9708 Analog Performance
Characteristics
Table 31 – 9711 Analog Performance
Characteristics
44
45
45
46
48
Table of Contents – Figures
Figure 1 – Package Outline
Figure 2 – STAC9708 Block Diagram
Figure 3 – Connection Diagram
Figure 4 – STAC9708 AC-Link
Figure 5 – AC'97 Standard Bi-directional
Figure 6 – AC-Link Audio Output Frame
Figure 7 – Start of an Audio Output Frame
Figure 8 – STAC9708 Audio Input Frame
Figure 9 – Start of an Audio Input Frame
Figure 10 – STAC9708 Powerdown Timing
Figure 11 – STAC9708 Mixer Functional Diagram
Figure 12 – Example of STAC9708 Powerdown/
Powerup flow
Figure 13 – STAC9708 Powerdown/Powerup
with analog still alive
Figure 14 – Cold Reset
Figure 15 – Warm Reset
Figure 16 – Clocks
Figure 17 – Data Setup and Hold
Figure 18 – Signal Rise and Fall Times
Figure 19 – AC-Link Low Power Mode Timing
Figure 20 – ATE Test Mode
6
7
8
12
15
15
16
19
20
22
23
35
35
38
39
39
40
41
42
42
Table 29 – ATE Test Mode
40
5 10/02/98

5 Page





STAC9708 arduino
SigmaTel, Inc.
Preliminary
STAC9708/11
DAC_OUT_L
O
Surround DAC Out Left Channel
DAC_OUT_R
O
Surround DAC Out Right Channel
* Note: any unused input pins should have a capacitor (1 uF suggested) to ground.
1.3 Filter/References/GPIO
These signals are connected to resistors, capacitors, specific voltages, or provide general purpose I/O.
Table 5. Filtering and Voltage References
SIGNAL NAME TYPE
DESCRIPTION
Vref O
Reference Voltage
Vrefout
O Reference Voltage out 5mA drive (intended for mic bias)
AFILT1
O
Anti-Aliasing Filter Cap - ADC channel
AFILT2
O
Anti-Aliasing Filter Cap - ADC channel
CAP1
O
Analog Output Hold-Off Delay
CAP2
O
ADC reference Cap
CAP3
O
Anti-Pop Power Sustain Delay
APOP
O
Anti-Pop Output Ground Shunt Control
EAPD
O
External Amplifier Power Down Control
11 10/02/98

11 Page







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