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부품번호 | KMPC875 기능 |
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기능 | (KMPC870 / KMPC875) Hardware Specifications | ||
제조업체 | ETC | ||
로고 | |||
전체 70 페이지수
Freescale Semiconductor
MPC875EC
Rev. 3.0, 07/2004
MPC875/MPC870
Hardware Specifications
This hardware specification contains detailed information on
power considerations, DC/AC electrical characteristics, and AC
timing specifications for the MPC875/MPC870. The CPU on the
MPC875/MPC870 is a 32-bit PowerPC™ core that incorporates
memory management units (MMUs) and instruction and data
caches and that implements the PowerPC instruction set. This
hardware specification covers the following topics:
1 Overview
The MPC875/MPC870 is a versatile single-chip integrated
microprocessor and peripheral combination that can be used in a
variety of controller applications and communications and
networking systems. The MPC875/MPC870 provides enhanced
ATM functionality over that of other ATM-enabled members of
the MPC860 family.
Contents
1. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2. Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
3. Maximum Tolerated Ratings . . . . . . . . . . . . . . . . . . . 7
4. Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . 9
5. Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
6. DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 10
7. Thermal Calculation and Measurement . . . . . . . . . . 11
8. Power Supply and Power Sequencing . . . . . . . . . . . 13
9. Mandatory Reset Configurations . . . . . . . . . . . . . . . 14
10. Layout Practices . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
11. Bus Signal Timing . . . . . . . . . . . . . . . . . . . . . . . . . . 15
12. IEEE 1149.1 Electrical Specifications . . . . . . . . . . . 44
13. CPM Electrical Characteristics . . . . . . . . . . . . . . . . . 46
14. USB Electrical Characteristics . . . . . . . . . . . . . . . . . 67
15. FEC Electrical Characteristics . . . . . . . . . . . . . . . . . 67
16. Mechanical Data and Ordering Information . . . . . . . 71
17. Document Revision History . . . . . . . . . . . . . . . . . . . 82
© Freescale Semiconductor, Inc., 2004. All rights reserved.
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Features
— 12 port pins with interrupt capability
— 23 internal interrupt sources
— Programmable priority between SCCs
— Programmable highest priority request
• Communications processor module (CPM)
— RISC controller
— Communication-specific commands (for example, GRACEFUL STOP TRANSMIT, ENTER HUNT MODE, and
RESTART TRANSMIT)
— Supports continuous mode transmission and reception on all serial channels
— 8-Kbytes of dual-port RAM
— Several serial DMA (SDMA) channels to support the CPM
— Three parallel I/O registers with open-drain capability
• On-chip 16 × 16 multiply accumulate controller (MAC)
— One operation per clock (two-clock latency, one-clock blockage)
— MAC operates concurrently with other instructions
— FIR loop—Four clocks per four multiplies
• Four baud-rate generators
— Independent (can be connected to any SCC or SMC)
— Allows changes during operation
— Autobaud support option
• SCC (serial communication controller)
— Ethernet/IEEE 802.3 optional on the SCC, supporting full 10-Mbps operation
— HDLC/SDLC
— HDLC bus (implements an HDLC-based local area network (LAN))
— Asynchronous HDLC to support point-to-point protocol (PPP)
— AppleTalk
— Universal asynchronous receiver transmitter (UART)
— Synchronous UART
— Serial infrared (IrDA)
— Binary synchronous communication (BISYNC)
— Totally transparent (bit streams)
— Totally transparent (frame based with optional cyclic redundancy check (CRC))
• SMC (serial management channel)
— UART (low-speed operation)
— Transparent
• Universal serial bus (USB)—Supports operation as a USB function endpoint, a USB host controller, or both
for testing purposes (loopback diagnostics)
— USB 2.0 full-/low-speed compatible
— The USB function mode has the following features:
– Four independent endpoints support control, bulk, interrupt, and isochronous data transfers.
MPC875/MPC870 Hardware Specifications, Rev. 3.0
4
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Freescale Semiconductor
4페이지 The MPC870 block diagram is shown in Figure 2.
Maximum Tolerated Ratings
Embedded
MPC8xx
Processor
Core
Instruction
Bus
8-Kbyte
Instruction Cache
Instruction MMU
32-Entry ITLB
Load/Store
Bus
8-Kbyte
Data Cache
Data MMU
32-Entry DTLB
Unified
Bus
Slave/Master IF
System Interface Unit (SIU)
Memory Controller
Internal
External
Bus Interface Bus Interface
Unit Unit
System Functions
PCMCIA-ATA Interface
Fast Ethernet
Controller
DMAs
DMAs
FIFOs
10/100
BaseT
Media Access
Control
MIII / RMII
Parallel I/O
4 Interrupt 8-Kbyte
Timers Controllers Dual-Port RAM
4 Baud Rate
Generators
Parallel Interface Port
32-Bit RISC Controller
and Program
Timers
ROM
Virtual IDMA and
Serial DMAs
USB
SMC1
SPI I2C
Serial Interface
Figure 2. MPC870 Block Diagram
3 Maximum Tolerated Ratings
This section provides the maximum tolerated voltage and temperature ranges for the MPC875/870. Table 2
displays the maximum tolerated ratings, and Table 3 displays the operating temperatures.
Freescale Semiconductor
MPC875/MPC870 Hardware Specifications, Rev. 3.0
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
7
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부품번호 | 상세설명 및 기능 | 제조사 |
KMPC870 | (KMPC870 / KMPC875) Hardware Specifications | ETC |
KMPC875 | (KMPC870 / KMPC875) Hardware Specifications | ETC |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |