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XR-T56L85 데이터시트 PDF




Exar Corporation에서 제조한 전자 부품 XR-T56L85은 전자 산업 및 응용 분야에서
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부품번호 XR-T56L85 기능
기능 Low Power PCM Line Interface
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XR-T56L85 데이터시트, 핀배열, 회로
...the analog plus companyTM
XR-T56L85
Low Power
PCM Line Interface
FEATURES10
D Low Power (Typical 14mA)
D Single +5V Supply
D Up to 2.048 Mbps Operation in Both TX and RX
Directions
D Receiver Input can be:
– Balanced Transformer Coupled
– Capacitively (Twisted Pair)
– Single Coaxial Capacitive Coupling
APPLICATIONS
D T1 and CEPT Interfaces
D CPI
D DMI
June 1997-3
GENERAL DESCRIPTION
The XR-T56L85 is a PCM line interface chip. It consists of
both transmit and receive circuitry in a DIL 18 pin
package. The maximum bit rate the chip can handle is
2.048 Mbps and the signal level to the received can be
attenuated by 10dB of cable loss at half the bit rate. Total
current consumption is between 12-16mA at +5V.
ORDERING INFORMATION
Part No.
XR-T56L85N
XR-T56L85D
Package
18 Lead 300 Mil CDIP
18 Lead 300 Mil JEDEC SOIC
Operating
Temperature Range
-40°C to +85°C
-40°C to +85°C
BLOCK DIAGRAM
RXDATA+ 2
RXDATA- 3
RXVCC 9
RXGND 7
TXVCC 18
TPOS 17
TCLK 16
TNEG 12
TXGND 14
Peak
Detector
Bias
PDC
1
Positive
Threshold
Comparator
+
Negative
Threshold
Comparator
+
Bias
TTL Buffer
11 RPOS
TTL Buffer
8 RCLK
4 TE
TTL Buffer
10 RNEG
6 TANK BIAS
TTL Buffer
TTL Buffer
5 BIAS
15 TXDATA+
13 TXDATA-
Figure 1. Block Diagram
Rev. 2.01
E1992
EXAR Corporation, 48720 Kato Road, Fremont, CA 94538 z (510) 668-7000 z FAX (510) 668-7017
1




XR-T56L85 pdf, 반도체, 판매, 대치품
XR-T56L85
ABSOLUTE MAXIMUM RATINGS
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . +20V
Storage Temperature . . . . . . . . . . . . . . -65°C to 150°C
SYSTEM DESCRIPTION
The Receiver
The incoming bipolar PCM signal, which is attenuated
and distorted by the cable is applied to the receiver input,
consisting of the RX DATA(+) and RX DATA(-) pins, either
through a balanced transformer, a balanced capacitively
coupled terminal or a single-ended coaxial cable (see
Figure 5). A peak detector following the input generates a
DC reference for the positive and negative threshold
comparator (to extract the positive and negative data
pulses). Information on the positive and negative data
pulses is outputed as TTL compatible signals at pins
RPOS and RNEG, respectively. More specifically, an
output signal present at the RPOS pin indicates that a
positive pulse was received at the RX DATA(+)/RX
DATA(-) pins, from the incoming bipolar data stream.
Likewise an output signal present at the RNEG pin
indicates that a negative pulse was received at the RX
DATA(+)/RX DATA(-) pins. This conversion from the
bipolar signal to TTL compatible signals allows for digital
processing of the clock and data signals by the terminal
equipment. An example of the waveforms of the TTL
compatible recovered clock and data as output by the
receiver portion of the chip is presented in Figure 2,
Figure 3 and Figure 5. A tank circuit tuned to the
appropriate frequency is added externally to provide the
appropriate frequency-selective filtering of the received
clock signal.
The Transmitter
The transmitter portion of the chip receives TTL
compatible signals and transmits a corresponding bipolar
data stream down the line (See Figure 5). TPOS and
TNEG are TTL compatible signals that dictate the polarity
of the pulse to be generated and transmitted on the output
bipolar data stream. Both TPOS and TNEG inputs are
sampled by the rising edge of the transmit clock, TCLK.
The TX DATA(+) and TX DATA(-) pins form a differential
driver output, this is used to drive AMI data down the line
via a transformer. The TX DATA(+) and TX DATA(-) pins
are open-collector outputs.
When a logic “high” signal is applied to the TPOS pin, a
positive pulse (the positive portion of the bipolar data
stream) will be transmitted to the line via the TX DATA(+)
O/P and TX DATA(-) O/P pins. Likewise, when a logic
“high” signal is applied to the TNEG pin, a negative pulse
will be transmitted to the line via the TX DATA(+) and TX
DATA(-) pins. An illustration of the key waveforms
involved in this TTL to AMI conversion process, in the
Transmitter portion of the chip is presented in Figure 4.
Rev. 2.01
4

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XR-T56L85 전자부품, 판매, 대치품
XR-T56L85
RCACON
0.1µF
75
0.1µF
2
3
5
TIP
RING
T1 2
120
1:1
0.1µF
3
5
TIP
120
RING
0.1µF
0.1µF
0.1µF
2
3
5
VCC
0.1µF
18
2
2 VCC
RXDATA+
3
3
RXDATA-
15
TXDATA+
56
5
5
BIAS
13
TXDATA-
56
4 T.E.
LC
XR-T56L85 14
TGND
4.7µF
6 TANK BIAS
VCC
0.1µF
0.1µF
0.1µF
9 RVCC
1 PDC
7
RGND
TCLK 16
TPOS 17
TNEG 12
RPOS 11
RNEG 10
RCLK 8
U1
56L85TA
T2
PE65415
1:1:1
TCLK
TPOS
TNEG
RPOS
RNEG
RCLK
TIP
RING
L=Tank Coil AIE 415–0804 (1.544 and 2.048 Mbs)
Device 1.544Mbs 2.048Mbs
L
60µH
60µH
C
175pF
100pF
Figure 5. Application Circuit for XR-T56L85
Rev. 2.01
7

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부품번호상세설명 및 기능제조사
XR-T56L85

Low Power PCM Line Interface

Exar Corporation
Exar Corporation

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