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PDF IRFZ48N Data sheet ( Hoja de datos )
| Número de pieza | IRFZ48N | |
| Descripción | N-channel enhancement mode TrenchMOS transistor | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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Philips Semiconductors
N-channel enhancement mode
TrenchMOSTM transistor
Product specification
IRFZ48N
GENERAL DESCRIPTION
N-channel enhancement mode
standard level field-effect power
transistor in a plastic envelope using
’trench’ technology. The device
features very low on-state resistance
and has integral zener diodes giving
ESD protection up to 2kV. It is
intended for use in switched mode
power supplies and general purpose
switching applications.
QUICK REFERENCE DATA
SYMBOL PARAMETER
VDS
ID
Ptot
Tj
RDS(ON)
Drain-source voltage
Drain current (DC)
Total power dissipation
Junction temperature
Drain-source on-state
resistance
VGS = 10 V
MAX.
55
64
140
175
16
PINNING - TO220AB
PIN DESCRIPTION
1 gate
2 drain
3 source
tab drain
PIN CONFIGURATION
tab
1 23
SYMBOL
d
g
s
UNIT
V
A
W
˚C
mΩ
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
VDS
VDGR
±VGS
ID
ID
IDM
Ptot
Tstg, Tj
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Drain current (DC)
Drain current (DC)
Drain current (pulse peak value)
Total power dissipation
Storage & operating temperature
-
RGS = 20 kΩ
-
Tmb = 25 ˚C
Tmb = 100 ˚C
Tmb = 25 ˚C
Tmb = 25 ˚C
-
ESD LIMITING VALUE
SYMBOL
VC
PARAMETER
Electrostatic discharge capacitor
voltage, all pins
CONDITIONS
Human body model
(100 pF, 1.5 kΩ)
THERMAL RESISTANCES
SYMBOL
Rth j-mb
Rth j-a
PARAMETER
Thermal resistance junction to
mounting base
Thermal resistance junction to
ambient
CONDITIONS
-
in free air
MIN.
-
-
-
-
-
-
-
- 55
MAX.
55
55
20
64
45
210
140
175
UNIT
V
V
V
A
A
A
W
˚C
MIN.
-
MAX.
2
UNIT
kV
TYP.
-
60
MAX.
1.1
-
UNIT
K/W
K/W
February 1999
1
Rev 1.000
1 page  
Philips Semiconductors
N-channel enhancement mode
TrenchMOSTM transistor
Product specification
IRFZ48N
2.5 a
BUK959-60 Rds(on) normlised to 25degC
2
1.5
1
0.5
-100
-50
0 50 100 150 200
Tmb / degC
Fig.9. Normalised drain-source on-state resistance.
a = RDS(ON)/RDS(ON)25 ˚C = f(Tj); ID = 25 A; VGS = 5 V
VGS(TO) / V
5
max.
4
typ.
3
min.
2
BUK759-60
1
0
-100
-50
0 50
Tj / C
100 150 200
Fig.10. Gate threshold voltage.
VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS
1E-01
Sub-Threshold Conduction
1E-02
1E-03
2% typ
98%
1E-04
1E-05
1E-06
01234
Fig.11. Sub-threshold drain current.
ID = f(VGS); conditions: Tj = 25 ˚C; VDS = VGS
5
4
3.5
3
2.5
2 Ciss
1.5
1
5
0
0.01 0.1
1 VDS/V 10
Coss
Crss
100
Fig.12. Typical capacitances, Ciss, Coss, Crss.
C = f(VDS); conditions: VGS = 0 V; f = 1 MHz
12
VGS/V
10
8
VDS = 14V
VDS = 44V
6
4
2
0
0 10 20 30 QG/nC 40 50 60
Fig.13. Typical turn-on gate-charge characteristics.
VGS = f(QG); conditions: ID = 50 A; parameter VDS
100
IF/A
80
60
Tj/C = 175
25
40
20
0
0 0.2 0.4 0.6 0.8 1 1.2 1.4
VSDS/V
Fig.14. Typical reverse diode current.
IF = f(VSDS); conditions: VGS = 0 V; parameter Tj
February 1999
5
Rev 1.000
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet IRFZ48N.PDF ] | |
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