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PDF CS4397 Data sheet ( Hoja de datos )

Número de pieza CS4397
Descripción 24-Bit / Multi-Standard D/A Converter for Digital Audio
Fabricantes Cirrus Logic 
Logotipo Cirrus Logic Logotipo



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CS4397
24-Bit, Multi-Standard D/A Converter for Digital Audio
Features
l 24 Bit Conversion
l Up to 192 kHz Sample Rates
l 120 dB Dynamic Range
l -100 dB THD+N
l Supports PCM, DSD and External
Interpolation filters
l Advanced Dynamic-Element Matching
l Low Clock Jitter Sensitivity
l Digital De-emphasis for 32 kHz, 44.1 kHz and
48 kHz
l External Reference Input
I
Description
The CS4397 is a complete high performance 24-bit
48/96/192 kHz stereo digital-to-analog conversion sys-
tem. The device includes a digital interpolation filter
followed by a oversampled multi-bit delta-sigma modula-
tor which drives dynamic-element-matching (DEM)
selection logic. The output from the DEM block controls
the input to a multi-element switched capacitor DAC/low-
pass filter, with fully-differential outputs. This multi-bit ar-
chitecture features significantly lower out-of-band noise
and jitter sensitivity than traditional 1-bit designs, and the
advanced DEM guarantees low noise and distortion at
all signal levels.
ORDERING INFORMATION
CS4397-KS -10° to 70° C 28-pin Plastic SOIC
CDB4397 Evaluation Board
SCLK
LRCK
SDATA
SERIAL INTERFACE
AND FORMAT SELECT
SOFT MUTE
DE-EMPHASIS
FILTER
MCLK
CLOCK
DIVIDER
INTERPOLATION
FILTER
MULTI-BIT
∆Σ
MODULATOR
INTERPOLATION
FILTER
MULTI-BIT
∆Σ
MODULATOR
HARDWARE MODE CONTROL
(CONTROL PORT)
DYNAMIC
ELEMENT
MATCHING
LOGIC
SWITCHED
CAPACITOR-DAC
AND FILTER
DYNAMIC
ELEMENT
MATCHING
LOGIC
SWITCHED
CAPACITOR-DAC
AND FILTER
VOLTAGE REFERENCE
AOUTL+
AOUTL-
AOUTR+
AOUTR-
M4 M3
M2 M1 M0 RESET MUTEC MUTE
(AD0/CS) (AD1/CDIN) (SCL/CCLK)
(SDA/CDOUT)
FILT+ VREF FILT- CMOUT
Advance Product Information
P.O. Box 17847, Austin, Texas 78760
(512) 445 7222 FAX: (512) 445 7581
http://www.cirrus.com
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
Copyright © Cirrus Logic, Inc. 1999
(All Rights Reserved)
JUL ‘99
DS333PP1
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CS4397 pdf
CS4397
ANALOG CHARACTERISTICS (Continued)
Parameter
Symbol
Power Supplies
Supply Current
VA = 5 V
Power Dissipation
VA = 5 V
normal operation
normal operation
power-down state
normal operation
power-down
IA
ID
ID + IA
Power Supply Rejection Ratio (1 kHz)
(Note 3) PSRR
(120 Hz)
VD = 3 V
Min Typ Max
- 20 TBD
- TBD TBD
- 60 -
- TBD TBD
- 0.3 -
- 60 -
- 40 -
VD = 5 V
Min Typ Max
- 20 TBD
- TBD TBD
- 30 -
- TBD TBD
- 0.3 -
- 60 -
- 40 -
Unit
mA
mA
µA
mW
mW
dB
dB
Parameter
Analog Output
Full Scale Differential Output Voltage
Common Mode Voltage
Interchannel Gain Mismatch
Gain Drift
Differential DC Offset
AC-Load Resistance
Load Capacitance
Interchannel Isolation
Symbol
(1 kHz)
RL
CL
Min
TBD
-
-
-
-
1
-
-
Typ
1.4VREF
0.5VREF
0.1
100
2.0
-
-
90
Max
Unit
TBD
-
-
-
TBD
-
100
-
Vpp
VDC
dB
ppm/°C
mV
k
pF
dB
Notes: 3. Valid with the recommended capacitor values on FILT+ and CMOUT as shown in Figure 1. Increasing
the capacitance will also increase the PSRR.
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CS4397 arduino
CS4397
DSD - SWITCHING CHARACTERISTICS (TA= -10 to 70°C; Logic 0 = AGND = DGND; Logic
1 = VD = 5.25 to 3.0 Volts; CL = 20 pF)
Parameter
Symbol Min
Typ Max Unit
Input Bit Rate per Channel
(64x Oversampled)
(128x Oversampled)
1.024
2.048
- 3.2 Mb/s
- 6.4 Mb/s
Master Clock Frequency
(CLKMODE = 0)
(CLKMODE = 1)
4.096
6.144
- 12.8 MHz
- 19.2 MHz
MCLK Duty Cycle
(All DSD modes)
40 - 60 %
DSD_SCLK Pulse Width Low
DSD_SCLK Pulse Width High
DSD_SCLK Frequency
(64x Oversampled)
(128x Oversampled)
tsclkl
tsclkh
20
20
1.024
2.048
- - ns
- - ns
- 3.2 MHz
- 6.4 MHz
DSD_LI_R valid to DSD_SCLK rising setup time
DSD_SCLK rising to DSD_L or DSD_R hold time
tsdlrs
tsdh
20
20
- - ns
- - ns
DSD_SCLK
DSD_L, DSD_R
t sclkh
t sclkl
t sdlrs t sdh
Figure 2. Direct Stream Digital - Serial Audio Input Timing
DS333PP1
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